Things to Know 1 Midterm 2

0.0(0)
Studied by 0 people
call kaiCall Kai
learnLearn
examPractice Test
spaced repetitionSpaced Repetition
heart puzzleMatch
flashcardsFlashcards
GameKnowt Play
Card Sorting

1/29

encourage image

There's no tags or description

Looks like no tags are added yet.

30 Terms

1
New cards

What is the formula for average memory access time? What about total cycles used?

Avg = hitTime + missRate * missPenalty

total = hitTime * accesses + missPenalty * misses

2
New cards

What is access / memory latency?

How many machine cycles it takes to access data

3
New cards

What is the L1 cache usually broken down into? What do the other caches usually do? What is L0?

I cache (instructions), D cache (data)

Remember both (shared)

Registers

4
New cards

What is temporal locality? What is good/high vs bad/low?

Describes pattern in time; how frequently program uses same data

Good/high → same data used over and over in short period

Bad/low → data used once or rarely

5
New cards

What is spatial locality? What is good/high vs bad/low?

Describes pattern in space; accessing data near other recently accessed data

Good/high → access nearby data many times

Bad/low → jumps around addresses ignoring lots of data

6
New cards

What is the complement of hit rate and how can you use it to calculate hit rate?

hitRate = 1 - missRate

7
New cards

How is a cache generally organized?

S sets, E lines per set, B = bytes per cache block

8
New cards

How is the address of some data laid out?

First t bits = tag, next s bits = set index, last b bits = block offset

9
New cards

What is considered a cache hit?

That set has that tag AND it’s valid

10
New cards

What is a direct mapped cache?

1 line per set

11
New cards

What does E-way set associative cache mean?

E lines per set

12
New cards

What is a write hit? What are the 2 subsequent actions possible?

Writing a value that’s already in the cache

  1. Write through: write to cache and memory at same time

  2. Write back: defer write to memory until line is replaced


13
New cards

What is a write miss? What are the 2 subsequent actions possible?

Writing a value that’s no longer in the cache

  1. Write allocate: fetch value from memory and pull up through cache hierarchy, then write back

  2. No write allocate: write directly to memory


14
New cards

What are the 3 abstractions provided by the kernel?

  1. Processes (abstraction for processor)

  2. Virtual memory (abstraction for main memory)

  3. Files (abstraction for I/O devices)


15
New cards

What exactly is a process and what does it know and do? What is the kernel’s scope?

Instance of running program; knows only of itself and possibly talks to other processes with IPC

Knows everything and controls everything

16
New cards

Do system calls or library functions reset errno to 0?

NO

17
New cards

What is a file descriptor (FD) and how many does each process have?

Non negative integer referring to an open file (used with all types of open files)

Each process has own set of FDs

18
New cards

What are the 3 always open FDs?

0 → stdin = STDIN_FILENO

1 → stdout = STDOUT_FILENO

2 → stderr = STDERR_FILENO

19
New cards

Explain “int fd3 = open(pathName, flags, mode);”

pathName = file’s name

flags = read, write, or both

mode = permissions for a new file (optional)

Success → return lowest unused FD, err → return -1

20
New cards

Explain “ssize_t numread = read(fd, buffer, count);”

Stores at most count bytes and stores them in buffer

Returns num bytes actually read

21
New cards

Explain “ssize_t write (fd, buffer, count);”

Writes up to count bytes from buffer into open file

Returns num bytes actually read

22
New cards

Explain “off_t lseek(int fd, off_t offset, int whence);” (return val, args, whence)

Success → return new offset, err → return -1

offset = num bytes to move

whence = point from where offset interpreted

  1. SEEK_SET: beginning

  2. SEEK_CUR: current position

  3. SEEK_END: end

END and CUR can take negative offset, SET must be non-negative

23
New cards

How is main memory organized (RAM)?

M contiguous 1 byte cells (each has physical address, PA)

0 indexed

Partitioned into blocks called physical pages

24
New cards

How is virtual memory (VM) organized?

N contiguous 1 byte cells stored on disk

Partitioned into blocks called virtual pages

25
New cards

What is the page table? How is it organized? What do PTEs consist of?

Way for VM to find page if cached or find on disk if miss, cache it, and handle eviction

Array of PTEs (page table entries) each point to physical address (in RAM)

Valid bit + n bit address field

26
New cards

What is a page fault in address translation?

Page isn’t cached in RAM

27
New cards

What is paging/swapping/page allocation?

After page fault, OS does this to put needed page in RAM

28
New cards

What is a virtual address composed of?

VPN + VPO

Virtual page number + Virtual page offset

VPN = index into page table → VPN # bits = log base 2 (# of PTEs)

# bits for VA = log base 16 (# VAs)

29
New cards

How do you generate the physical address of a virtual address?

PPN + VPO

Physical page number + Virtual page offset

30
New cards

What do the page table entries of the page table hold?

Valid bit + PPN (Physical Page Number bits)