Essentials of Computer Organization and Architecture - Chapter 1 Vocabulary

Vocabulary flashcards covering key terms, hardware and software concepts, system standards, computer generations, memory structures, hierarchy levels, and architectural models from Chapter 1.

Computer Organization

Encompasses all physical aspects of computer systems (e.g., circuit design, control signals, memory types) and addresses how a computer works.

Computer Architecture

Logical aspects of system implementation as seen by the programmer (e.g., instruction sets, instruction formats, data types, addressing modes) and addresses how to design a computer.

Principle of Equivalence of Hardware and Software

States that any task done by software can also be done using hardware, and any operation performed directly by hardware can be done using software (assuming speed is not a concern).

Hertz

A measure of clock cycles per second (frequency) used to describe processor speeds in $\text{MHz}$ or $\text{GHz}$.

Byte

A unit of storage where $1\text{KB} = 2^{10} = 1024\text{ Bytes}$, $1\text{MB} = 2^{20} = 1,048,576\text{ Bytes}$, and $1\text{GB} = 2^{30} = 1,099,511,627,776\text{ Bytes}$.

Cycle Time

The reciprocal of clock frequency. For example, a bus operating at $133\text{MHz}$ has a cycle time of $7.52\text{ ns/cycle}$ ($133,000,000\text{ cycles/second} = 7.52\text{ ns/cycle}$).

RAM

An acronym for Random Access Memory; main memory where contents can be accessed directly if their location is known.

Cache

A type of temporary memory that can be accessed faster than RAM.

SATA

Stands for Serial Advanced Technology Attachment; describes how a hard disk interfaces with (or connects to) other system components.

Serial Ports

Communication ports that send data as a series of pulses along one or two data lines.

Parallel Ports

Communication ports that send data as a single pulse along at least eight data lines.

Universal Serial Bus (USB)

An intelligent serial interface that is self-configuring and supports plug and play.

PCI

Peripheral Component Interface; a dedicated I/O bus used to augment system buses.

Active Matrix Technology

Display technology that uses one transistor per picture element (pixel).

IEEE

The Institute of Electrical and Electronics Engineers; promotes the interests of the worldwide electrical engineering community and establishes standards for computer components, data representation, and signaling protocols.

ITU

The International Telecommunications Union; concerns itself with the interoperability of telecommunications systems, including data communications and telephony.

ISO

The International Organization for Standardization (derived from Greek "isos" meaning "equal"); establishes worldwide standards for computer hardware, software, and methods of manufacture.

Generation Zero Computers

Mechanical calculating machines developed between 1642 and 1945, including Schickard's Calculating Clock, Pascal's Pascaline, Leibniz's Stepped Reckoner, Babbage's Difference Engine, and Hollerith's tabulating machines.

First Generation Computers

Vacuum tube computers (1945–1953), including systems such as ENIAC (first general-purpose computer), ABC (first completely electronic computer), Z1, and IBM 650.

Second Generation Computers

Transistorized computers (1954–1965), including IBM 7094 and 1401, DEC PDP-1, Univac 1100, and Control Data Corporation 1604.

Third Generation Computers

Integrated circuit computers (1965–1980), including IBM 360, DEC PDP-8 and PDP-11, and Cray-1 supercomputer.

Fourth Generation Computers

VLSI (Very large-scale integrated circuits) computers (1980–present) containing more than 10,000 components per chip, enabling microprocessors like the Intel 4004.

Moore's Law

A 1965 statement by Gordon Moore that "The density of transistors in an integrated circuit will double every year," with a contemporary version stating "The density of silicon chips doubles every 18 months."

Rock's Law

A rule by Arthur Rock stating that "The cost of capital equipment to build semiconductors will double every 4 years."

Computer Level Hierarchy

A set of virtual machine layers where each level is an abstraction of the level below it, executing its own instructions by calling upon lower levels.

Level 2 (Instruction Set Architecture Level)

The Machine Level in the computer hierarchy, consisting of instructions specific to the architecture that require no compilers, interpreters, or assemblers.

Level 1 (Control Level)

The hierarchy level where a control unit decodes and executes instructions and moves data; control units can be microprogrammed or hardwired.

Level 0 (Digital Logic Level)

The level consisting of digital circuits (chips), gates, and wires that implement the mathematical logic of all other levels.

Software as a Service (SaaS)

A Cloud computing model where consumers buy application services over the Internet (e.g., Gmail, Dropbox, GoToMeeting, Netflix).

Platform as a Service (PaaS)

A Cloud computing model providing server hardware, operating systems, database services, security components, and backup and recovery services (e.g., Google App Engine, Microsoft Windows Azure).

Infrastructure as a Service (IaaS)

A Cloud computing model providing server hardware, secure network access, and backup/recovery services, with system software managed by the customer.

SCADA

Supervisory Control and Data Acquisition; systems operating vital physical infrastructure such as power generation, transportation networks, sewage systems, and oil and gas pipelines.

Congestive Collapse

A condition on the Internet where routers become overwhelmed and reroute packets to other routers, which then become overwhelmed in a cascading fashion.

von Neumann Architecture

A stored-program computer architecture featuring three hardware systems: CPU, main memory system, and I/O system, carrying out sequential instruction processing.

von Neumann Bottleneck

The single data path between the CPU and main memory in a von Neumann system.

Harvard Architecture

A non-von Neumann computer architecture providing separate buses for data and instructions.

Multicore Processors

Processors with two or more processor cores sharing a single die, where each core has its own ALU and set of registers while sharing memory and other resources.