lecture_5

Programming and Control

Data Routing within Systems

• Digital circuits manage logical operations and data transfer, which is essential for the functioning of electronic devices.

• Key tasks include:

  • Performing logical and decision-making operations (e.g., using Boolean algebra for condition evaluation).

  • Code/decoding data formats, such as converting binary inputs to seven-segment displays with a decoder.

• Data movement between various components is crucial and includes:

  • Transferring data from microprocessors to memory devices.

  • Selecting and preparing data for processing in arithmetic circuits.

Main Data Routing Techniques

• Multiplexers: Direct multiple inputs to a single output based on selection criteria.

• Buses: Facilitate communication channels between multiple sources and destinations, often found in computer architecture.

Multiplexers (MUX)

• Functions as a data routing component that selects one input from multiple inputs based on predefined selection lines.

• Significant characteristics include:

  • Operating like an electronic multi-way switch, allowing only one input to pass through to the output at any given time.

  • Serves as essential building blocks in digital systems, aiding in simplifying complex circuit designs.

  • The selection inputs are typically binary coded, meaning a multiplexer with four inputs will use two select lines to determine the output.

• Example: In a multiplexer with four 8-bit inputs, the output will provide one 8-bit data based on the binary state of the select lines (00, 01, 10, 11).

• Multi-bit capabilities: Multiplexers can manage wide data streams, making them versatile for various applications.

Simple Multiplexer Design

• One-bit Two-way Multiplexer:

  • Symbol: Can be visually represented as a simple switch in circuit diagrams.

  • Functional Concept: Can be illustrated with a truth table that outlines the connection between input values and corresponding output behavior.

4-Bit 2-Way Multiplexer Design

• Demonstrates all bits in the symbol representation.

• An enable selection will dictate if outputs draw from Word 0 or Word 1, based on the status of the select lines.

• Detailed representation shows multi-bit connections enhancing clarity in design.

Buses

• Point to Point Communication: This method is essential for effective interconnections within subsystems.

• Shared Buses:

  • Enable multiple subsystems to communicate without intricate wiring setups.

  • Ensure that at any given time, only one device can use the bus, often controlled by an active microprocessor to manage data flow.

  • Arbitration may be required when multiple controllers attempt to access the bus concurrently.

Tristate Buses

• Prevent conflicts from multiple logic outputs attempting to access the same bus line.

• Bus Drivers: Employ tristate buffers that manage the active states of buses, ensuring only one buffer operates at once while others remain in a high impedance state (indicated as Z).

Tristate Outputs

• Outputs can be effectively disconnected (high impedance state) based on specific control inputs.

• An enable input (E) is employed to determine whether outputs follow logic signals or disconnect: truth tables and functional concepts provide clear illustrations of behavior.

Connecting to a Bus

• Enable Signals: Signal specific subsystems on which data can be written to the bus, facilitating organized communication.

• Multi-bit lines connect various subsystems while incorporating distinct enable controls for efficient management of data flow.

Logic Building Blocks

• Key components in digital systems consist of:

  • Multiplexers

  • Adders

  • Subtractors

  • Tristate buffers

  • 1-of-N decoders

  • Priority encoders

• Programmable Logic Design: Logic functions can be integrated or constructed with the aid of software tools, like Field-Programmable Gate Arrays (FPGAs).

• Example of Discrete ICs:

  • Adder: MC14008B 4-Bit Full Adder specifications include:

    • Features a look-ahead carry output to facilitate fast addition, particularly in arithmetic applications.

    • Specifications including supported voltage range and thermal properties outlined for user reference.

Using IP Blocks

• Accessible through design software in various systems, allowing integration into custom electronic designs.

• IP blocks typically come equipped with datasheets that guide their implementation, providing essential parameters and configurations for optimal performance.

• Flexible designs can be created utilizing Hardware Description Language (HDL) coding.

1-of-N Decoders

• Activate a singular output based on the binary input provided, ensuring all other outputs remain inactive.

• Common Configurations: 1-of-4 (2-bit input), 1-of-8 (3-bit input), and so forth, showcasing their adaptability in logic circuits.

Priority Encoders

• Generate a binary output corresponding to the highest priority active input while also incorporating validity outputs to indicate the presence of input activity.