Chapter 1 - Introduction to Computer Systems - Flashcards
Course Learning Outcomes (Chapter 1)
Computer functions and interconnections
Computer architecture and computer organization
Concept of cache memory
Cache memory mapping
Input / Output in computer system
Input/Output data transfer
Asynchronous serial transfer
Asynchronous communication interface
Mode of transfer
What is a Computer?
A computer is an electronic device that manipulates information, or data. It has the ability to store, retrieve, and process data.
An electronic device capable of receiving information (data) in a particular form and performing a sequence of operations in accordance with a predetermined but variable set of procedural instructions (program) to produce a result in the form of information or signals.
Structure/block diagram of a computer (conceptual reference, not a fixed diagram in the transcript).
Computer Architecture
Refers to a set of attributes of a system as seen by the programmer.
Examples of architectural attributes include:
The instruction set
The number of bits used to represent data types
Input/output mechanism and technique for addressing memories
Computer architecture describes how a computer system is designed and what technologies it is compatible with.
Key idea: architecture is about what the system is designed to do at a logical level, independent of lower-level implementation details.
Computer Organization
Deals with the physical components of computer systems that interact with each other to perform functionalities.
Examples of organizational attributes include:
Hardware details transparent to the programmer such as control signals and interfaces between computer and peripherals
Memory technology used
Organization may change rapidly with technology; architecture tends to be more stable over long periods.
Functions of the Computer
Data processing: Arithmetic and logic instructions (ALU operations).
Data storage: Movement of data into or out of registers and/or memory locations.
Data movement (Input/Output): Data received from or delivered to a device; device is a peripheral.
Control: Test and branch instructions to direct program flow.
Interconnection Structures Within a Computer System
A computer consists of three basic module types: processor/CPU, memory, and I/O.
They communicate through an interconnection structure; this collection of paths is called the interconnection structure.
Design of the interconnection structure depends on the exchanges that must be made among modules.
Interconnection structures include:
Interconnection structures (general paths)
Bus interconnections (bus-based): a common form of connecting CPU, memory, and I/O
Processor/CPU: Controls operation of the computer and performs data processing
Main memory: Stores data
I/O: Moves data between the computer and external environment
Data exchanges to support reads/writes to memory and I/O, including DMA (direct memory access) where an I/O module can exchange data directly with memory without going through the processor
System Bus and Interconnection Details
A system bus connects major components (CPU, Memory, I/O) and consists of multiple lines; each line transmits a binary signal (0 or 1).
A bus is a communication pathway connecting two or more devices and is a shared transmission medium.
A bus can be 50–100 lines long (typical range): 50 \le \text{lines} \le 100.
On any bus, lines are classified into three groups: Data Lines, Address Lines, and Control Lines.
A bus may transmit data serially (one bit at a time) or in parallel (multiple bits simultaneously).
A system bus is the central conduit for data movement among CPU, memory, and I/O.
Memory and Storage
Memory / main memory: Used to store instructions or data; data/instructions may need to be accessed multiple times during processing.
External storage: Backing store or secondary memory; provides permanent storage of large quantities of data.
RAM stores data temporarily during operation; non-volatile storage (e.g., hard drives, SSDs) stores data when the system is powered off.
RAM types mentioned:
SRAM: Static RAM; fast; used as a memory cache; typically integrated as cache memory; SRAM is faster but more expensive.
DRAM: Dynamic RAM; slower; requires refreshing; used for main memory.
In modern systems, DRAM for main memory and SRAM for caches (internal/external) are common distinctions.
Central Processing Unit (CPU) and its Components
The CPU is the central brain of the PC; it handles the majority of operations.
The CPU contains:
Arithmetic Logic Unit (ALU)
Registers
Control Unit (CU)
The CPU executes programs stored in main memory by fetching, examining, and executing instructions one after another.
Diagrammatic description (textual):
Core components include: ALU, Control Unit, and Register file; these interact with memory and I/O units to perform computation.
Von Neumann Model
Proposed by John von Neumann; applies the stored-program concept.
Data and program stored in the same memory (shared memory space).
The model is based on three key concepts:
Data and instructions are stored in a single read/write memory.
Memory contents are addressable by location, independent of data type.
Execution occurs sequentially from one instruction to the next.
Structure (IAS computer lineage example) includes: CPU, main memory (M), Arithmetic-Logic Unit (ALU), Program Control Unit (CC), I/O equipment.
In practice: The CPU fetches an instruction from memory, decodes it, and executes it, coordinating with ALU and memory.
Architecture vs. Organization
Computer Architecture:
Attributes as viewed by the programmer; affects how a program executes.
Examples: instruction set, arithmetic support, addressing modes, and I/O mechanism.
Architecture tends to be stable long-term (e.g., x86 family) despite changes in organization.
Computer Organization:
Components that are implemented to support the architecture; hardware technology, interfaces, memory technology, and control signals.
Organization can change rapidly as technology evolves.
Interconnection and Bus Interconnection (Expanded)
Interconnection structures must support the following types of data transfers:
Memory to processor: read an instruction or a data unit from memory
Processor to memory: write a data unit to memory
I/O to processor: read data from an I/O device via an I/O module
Processor to I/O: send data to an I/O device
I/O to/from memory: an I/O module can exchange data directly with memory, using Direct Memory Access (DMA)
A bus is a shared communication pathway; a system bus connects CPU, memory, and I/O; it is typically composed of data lines, address lines, and control lines.
The interconnection structure forms the backbone for data movement within a computer system.
Cache Memory: Overview and Rationale
Cache memory sits between the CPU and main memory; a cache controller monitors CPU requests and predicts future memory access.
Data needed by the CPU is pre-fetched into cache so that subsequent accesses can be served faster from cache than from main memory.
Cache is built from SRAM, which is fast but expensive; hence caches are relatively small.
Tags are used to identify where cached data originated.
Cache memory can be located in two general places:
Inside the processor (internal cache)
On the motherboard (external cache)
Purpose: to store program instructions and data that are used repeatedly or likely to be needed next, to speed up processing.
Cache Memory Types and Hierarchy
L1 cache (primary cache): Extremely fast but small; typically embedded in the processor.
Typical size: 2\ \mathrm{KB} \le \text{L1 size} \le 64\ \mathrm{KB}.
L2 cache (secondary cache): More capacious than L1; may be embedded on the CPU or on a separate chip with a high-speed bus to the CPU.
Typical size: 256\ \mathrm{KB} \le \text{L2 size} \le 512\ \mathrm{KB}.
L3 cache (Last Level Cache, LLC): Larger than L1/L2 but slower; located outside the CPU and shared by all cores.
Typical size: 1\ \mathrm{MB} \le \text{L3 size} \le 8\ \mathrm{MB}.
How the cache works:
When a program starts, data flow from RAM to L3 cache, then to L2, and finally to L1.
Cache hit: the needed data is found in the cache.
Cache miss: the data is not in the cache and must be fetched from a lower level (RAM).
Cache vs main memory: Cache is faster but smaller; main memory is larger but slower; the combination speeds overall processing while controlling cost.
Cache Mapping: How Data Moves into the Cache
Transformation of data from main memory to cache memory is called mapping.
There are THREE (3) primary mapping methods used in cache organization:
Associative mapping: Any block of main memory can reside in any cache block position.
Direct mapping: A particular block of main memory is mapped to a particular cache block (not flexible).
Set-Associative mapping: Cache is divided into sets; a memory block can reside in any block within a specific set (trade-off between flexibility and hardware cost).
Practical implications:
Associative mapping offers the most flexibility but is expensive to implement.
Direct mapping is simple and fast but can cause more conflicts.
Set-Associative mapping provides a balance between flexibility and cost.
Memory Hierarchy and Cache Operation Details
The memory hierarchy concept explains why caches are necessary: faster, smaller memories are used to bridge the speed gap between CPU and main memory.
Cache locality principle: programs tend to reuse recently accessed data and nearby data; caches exploit temporal and spatial locality.
Cache coherence and sharing considerations arise in multi-core systems (LLC role in inter-core communication).
Practical Aspects and Real-World Relevance
Interconnection and cache design affect performance, energy efficiency, and cost in real systems.
Architecture vs. organization trade-offs guide computer design choices (stable instruction sets vs. evolving hardware implementations).
Understanding DMA and I/O transfers helps in assessing peripheral performance and system throughput.
Historical Context and Additional Notes
Historically, there have been two types of computers:
Fixed program computers: function is very specific and not reprogrammable (e.g., calculators).
Stored program computers: can be programmed to carry out many different tasks; applications are stored on them.
Von Neumann model emphasizes stored-program concept and sequential execution, which underpins most traditional computer designs.
Interconnection schemes and bus architectures have evolved from simple single-bus designs to more complex multi-bus and point-to-point interconnects, but the core concepts remain: data, address, and control signals must be transmitted reliably between CPU, memory, and I/O.
Key Takeaways for Exam Preparation
Understand the distinction between computer architecture (design level visible to programmer) and computer organization (physical implementation details).
Be able to describe the Von Neumann model and its three core concepts, plus its implication of sequential instruction execution.
Explain interconnection structures, bus concepts, and direct memory access (DMA).
Define cache memory, its purpose, and why it exists in the memory hierarchy.
Recognize the three main cache mapping strategies: Associative, Direct, and Set-Associative, with their trade-offs.
Distinguish SRAM vs DRAM and how each is used (SRAM for caches, DRAM for main memory).
Recall typical L1/L2/L3 cache sizes and the rationale behind the hierarchy (speed vs. size vs. cost).
Understand the role of I/O, memory, and CPU in data transfers and how the system bus enables these transfers.
Relate architectural concepts to practical performance considerations, including the impact of caching and memory access patterns on program speed.