Chapter5 (1)

Chapter 5 - Digital Systems I

XOR/XNOR

• XOR (Exclusive OR): A digital logic gate that implements an exclusive disjunction; outputs true or 1 if the inputs are different (1 and 0).

• XNOR: The inverse of XOR; outputs true or 1 if the inputs are the same.

Addition of Unsigned Numbers

• Similar to decimal addition, binary addition requires handling carries when the sum exceeds the base (2 for binary).

• Example: Adding binary values representing decimal numbers involves a carry just like decimal addition (Example: 9 + 11 decimal = 20, so in binary: 1001 + 1011).

Half Adder (HA)

• Half Adder: A circuit that adds two binary digits, producing a sum and a carry.

• Truth Table:

  • Inputs (X, Y) and Outputs (Carry, Sum):

    • (0, 0) → Carry = 0, Sum = 0

    • (0, 1) → Carry = 0, Sum = 1

    • (1, 0) → Carry = 0, Sum = 1

    • (1, 1) → Carry = 1, Sum = 0

Multi-bit Addition and Carry-in

• When adding multi-bit numbers, a Carry-in is utilized.

• Example: Adding binary 001 + 011 results in a carry-out that moves into the next significant bit position.

Full Adder

• Full Adder: A circuit that activates on carry otherwise behaves like half adder.

• It adds three input bits: Two significant bits and a Carry-in.

• Truth Table:

  • Inputs (X, Y, Ci) and Outputs (Carry-out, Sum):

    • Calculates Carry-out based on majority logic from inputs.

Ripple Carry Adder

• A type of adder built using full adders connected in series.

• The sum is produced sequentially from least significant bit (LSB) to most significant bit (MSB), leading to higher delays due to propagation of carries.

Overflow in Unsigned Addition

• Example: Adding 12 (1100) and 6 (0110) gives 18 (10010); in 4-bits this results in overflow which may not represent number correctly.

• Overflow detection: Occurs when there's a carry-out from the MSB position.

• Solutions: Allow for n+1 bits to handle adding two n-bit numbers.

Signed Binary Numbers

• Unsigned numbers: No sign bit is present in representation.

• Signed numbers: The leftmost bit indicates the sign (0 for positive, 1 for negative).

Representation of Signed Numbers

• Sign and Magnitude: Reserve the leftmost bit for the sign representation.

  • Not efficient as it complicates addition between numbers of different signs.

One’s Complement Representation

• Negation of numbers is achieved by inverting the bits.

• Example: To represent -14 from +14 the bits are inverted, +14 being (01110)2 changes to (10001)2 for -14.

Two’s Complement Representation

• To find negative of a binary number, take its one’s complement and add 1.

• More efficient in modern computers than one’s complement.

History of One’s and Two’s Complement

• One’s Complement: Utilized by early machines.

• Two’s Complement: Dominated post-1960 due to industrial standards set by companies such as IBM.

Comparison of Signed Integers

• Comparison Table (4-bit signed integers): Structure showing how different systems represent values from -8 to +7, highlighting that representation varies across systems such as sign & magnitude, one’s complement, and two’s complement.

Two’s Complement Conversion

• Process illustrated to convert values like 7 to -7 by performing binary operations to find the two’s complement.

Addition in One’s Complement

• Potential for complexities requiring end-around carry to adjust sums properly.

Overflow in One’s Complement

• Issues arise when adding two numbers of the same sign resulting in a different sign.

Sign Extension

• The process of repeating the sign bit to ensure the values remain represented correctly in wider bit-widths.

Adder/Subtractor Unit

• Functional block designed to perform addition and subtraction via control signals guiding the operation.