Introduction to Processes (Lecture Notes)
Introduction
- Course outline topics (from the slides):
- 1) Introduction
- 2) Process Evolution
- 3) Multiprogramming
- 4) Process Creation in Unix/Linux
- 5) Inter Process Communication (IPC)
- Emphasis from the introduction: a process is the OS abstraction that brings a program to life when executed.
- Analogy used: a program on disk is like a lifeless recipe; a process is like the act of cooking the dish, i.e., the program in execution.
What is a Process?
- A process is the abstraction of a program in execution.
- When a user runs a program, the OS creates a process to execute the program; the program comes alive as a process.
- Everyday analogy: A recipe on disk is lifeless; running the recipe is cooking—the process.
- Key phrasing in the slides: "A process is an abstraction of a program in execution."
Realizing the Abstraction
- A program lives on disk as a lifeless entity (e.g., a recipe).
- A process, however, requires more resources to run: to execute instructions and interact with the outside world.
- Central Processing Unit (CPU) to decode and execute instructions.
- Main Memory to store instructions and data.
- Input/Output (I/O) devices to interact with the outside world.
- The slides include a metaphor: just as a recipe needs tools (knife, cutting board, spoon, pot, pan, stove, etc.), a process needs hardware and an agent to carry out tasks.
- An implied role of an agent: something (software/hardware) must carry out actions on behalf of the process (execution, I/O, etc.).
Central Processing Unit (CPU)
- The CPU stores a lot of information about the process it is executing:
- program counter (PC): stores the address of the instruction being executed.
- instruction register (IR): stores the instruction currently being executed.
- general purpose registers: temporarily store operands.
- arithmetic logic unit (ALU): can operate only on data stored in CPU registers (question posed: Why?).
- condition code register (CCR): stores the result of the last operation; also known as the status register or flag register.
- stack pointer (SP): supports function calls (call/return management).
- Note on ALU data: to operate quickly, the ALU must work on data already in fast storage (registers) rather than repeatedly accessing slower memory.
Main Memory
- Main memory serves as the store for the process’s instructions and data while it runs.
- Constraints:
- A program resides on disk; during execution its instructions/data must reside in main memory.
- The CPU cannot access data stored on disk directly.
- Main memory is orders of magnitude slower than the CPU.
- Practical question posed: "What is the largest process that a machine can run?" (implies memory limits govern process size.)
- The slide emphasizes memory latency and the CPU-memory speed gap.
- Caching as a primary tactic to hide latency:
- Caches exist at multiple levels and kinds (address translation caches, instruction caches, data caches).
- Cache levels: L1, L2, L3, and L4 (different cache hierarchies).
- Besides caching, other techniques are needed to keep the CPU busy and improve utilization.
Latency Numbers and Memory Hierarchy (Latency Numbers Every Programmer Should Know)
- The slides provide a set of representative latency numbers to illustrate wide gaps between components:
- L1 cache reference: 0.5\ \text{ns}
- Branch mispredict: 5\ \text{ns}
- Main memory reference: 100\ \text{ns}
- L2 cache reference: 7\ \text{ns}
- Mutex lock/unlock: 25\ \text{ns}
- Read 1 KB over 1 Gbps network: 10\ \mu\text{s}
- Compress 1 KB with Zippy: 3\ \mu\text{s}
- Read 1 MB sequentially from memory: 250\ \mu\text{s}
- Read 1 MB sequentially from 55D (special interconnect): 1\ \text{ms}
- Disk seek: 10\ \text{ms}
- Read 1 MB sequentially from disk: 20\ \text{ms}
- Round trip within the same data center: 500\ \mu\text{s}
- Packet roundtrip from CA to Netherlands: 150\ \text{ms}
- Source note: the numbers come from a public gist (URL provided in the slide).
- These numbers illustrate the vast disparity between fast CPU operations and slower memory/disk/network accesses.
- The slide titled "Processor-Memory Performance Gap" illustrates the historical divergence between CPU speed and memory performance.
- Timeline fragment shown: years 1982 to 1999 (and surrounding decades) with two trend lines labeled DRAM and CPU.
- Conceptual takeaway:
- The CPU grew much faster than DRAM (memory) performance for a long period, creating a performance gap that required architectural solutions (e.g., caches) to mitigate.
- This gap motivates the need for memory hierarchy, caching, and techniques to keep the CPU busy while memory access occurs.
- Examples of I/O devices listed:
- Keyboard
- Display (monitor)
- Mouse
- Touch Screen
- Hard Disk
- Printer
- Webcam
- And others as the list keeps growing…
- Key characteristic: A typical I/O device is orders of magnitude slower than main memory.
- Central question raised: How do we hide the I/O latency gap?
Practical and Foundational Implications (synthesis)
- The CPU–memory–I/O hierarchy is the core infrastructure for process execution.
- The abstraction of a process relies on coordinated hardware and software resources:
- CPU executes instructions; PC/IR/CCR/SP track and manage execution state.
- Main memory holds the working set of instructions and data; caching reduces the effective latency of memory accesses.
- I/O devices enable interaction with users and the outside world but impose latency that must be hidden through techniques like buffering, asynchronous I/O, and scheduling.
- Real-world relevance: all modern operating systems implement a memory hierarchy, prefetching, and caching strategies to maximize CPU utilization and throughput while satisfying I/O and memory constraints.
Connections to Course Topics (how this excerpt fits into the larger curriculum)
- Process Evolution: understanding what a process is lays the groundwork for how systems transition from programs on disk to running processes in memory.
- Multiprogramming: implied by the need to manage multiple processes with limited CPU/memory/I/O resources (not detailed in these slides, but a natural extension).
- Process Creation in Unix/Linux: practical mechanisms for creating and scheduling processes would build on the concept of a process abstraction.
- Inter Process Communication (IPC): as processes run concurrently, IPC mechanisms become essential for coordination and data exchange (to be covered in later slides).
Ethical, Philosophical, and Practical Implications (note)
- The slides do not explicitly discuss ethical or philosophical implications; the content focuses on architectural and practical aspects of processes and systems.
- Practical implications emphasized: performance optimization through memory hierarchies, caching, and minimizing I/O latency to improve CPU utilization and overall system throughput.
Quick Reference: Key Terms and Concepts
- Process: abstraction of a program in execution.
- PC (Program Counter): address of the next instruction.
- IR (Instruction Register): holds the instruction being executed.
- CCR (Condition Code Register) / Flags: stores results of operations (status/flags).
- SP (Stack Pointer): supports function calls.
- ALU (Arithmetic Logic Unit): performs arithmetic/logic on data in CPU registers.
- Main Memory: stores instructions and data for the executing process.
- Caches: small, fast memory layers (L1, L2, L3, L4) to hide memory latency.
- I/O devices: peripherals for interaction with the external world (slower than memory).
- Latency numbers: give order-of-magnitude understanding of speed gaps between components (e.g., 0.5\ \text{ns} vs 100\ \text{ns} vs 10\ \text{ms}).
- Memory hierarchy principle: use fast, small caches to bridge the speed gap between CPU and memory/disk.
Note on scope of these notes
- These notes cover the content up to the I/O devices slide (Page 9). Topics like Process Evolution, Multiprogramming, Process Creation in Unix/Linux, and IPC are listed as course modules but are not expanded upon in the provided excerpt. When studying for the exam, use these notes as the foundational understanding of what a process is and how CPU, memory, and I/O interplay affect performance; supplement with the specific lecture material on the remaining topics.