Cambridge IGCSE Computer Science - Computer Architecture

The CPU & Microprocessors

• Purpose of the CPU:

  • Central Processing Unit (CPU) fetches, decodes, and executes instructions.

  • Acts as the brain of the computer, processing data and producing output.

  • Integral to devices like laptops, desktops, game consoles, and mobile devices.

• Terminology:

  • 'CPU' and 'Microprocessor' are often used interchangeably.

  • A microprocessor is an integrated circuit on a single chip.

• Input-Process-Output Example:

  • Input: User inputs a number via a keyboard.

  • Process: If the instruction is ADD, the value is added to an existing number.

  • Output: Result is displayed via a monitor.

Von Neumann Architecture

• Overview:

  • Proposed by John Von Neumann in the 1940s, most general-purpose computers rely on this architecture.

  • Components include:

    • Control Unit (CU)

    • Arithmetic Logic Unit (ALU)

    • Registers

    • Buses

• Functions of Components:

  • ALU — Performs arithmetic operations and makes logical decisions

  • Control Unit (CU) — Coordinates data movement in the CPU, sends control signals for data operations.

  • Registers — Fast memory within the CPU holding small data amounts needed for processing:

    • Program Counter (PC): Next instruction address. Increments by 1 during the fetch-decode-execute cycle.

    • Memory Address Register (MAR): Holds address for data/instructions fetched.

    • Memory Data Register (MDR): Stores fetched data/instruction.

    • Current Instruction Register (CIR): Stores current instruction being executed.

    • Accumulator (ACC): Stores results from ALU calculations.

  • Buses — Sets of wires that transmit data within the system:

    • Address Bus: Unidirectional, carries memory location data.

    • Data Bus: Bidirectional, carries instructions/data.

    • Control Bus: Bidirectional, carries control signals.

Fetch-Decode-Execute Cycle

• Purpose:

  • The cycle through which the CPU operates billions of times per second, consisting of three main steps:

  1. Fetch

  2. Decode

  3. Execute

• Stages:

  • Fetch Stage:

  • PC holds next instruction address.

  • Address copied to MAR and sent to main memory via the address bus.

  • Signal from CU triggers memory data transfer to MDR, and instruction is copied to CIR.

  • PC increments to point to next instruction.

  • Decode Stage:

  • Instruction split into opcode (what instruction is) and operand (what to do and its location).

  • Execute Stage:

  • CPU executes the fetched instruction (e.g., calculations, data storage, further fetching).

Characteristics of the CPU

• Key Characteristics:

  1. Clock Speed:

     • Measured in Hertz (Hz); indicates the number of cycles per second.

     • Modern CPUs operate in Gigahertz (GHz); e.g., 3.5GHz means up to 3.5 billion instructions per second.

  2. Cache Size:

     • Small, fast memory close to the CPU used for storing frequently accessed data.

     • Larger cache leads to improved performance by reducing fetch cycles from RAM.

  3. Number of Cores:

     • Each core operates as a separate CPU, capable of parallel processing.

     • E.g., a quad-core CPU at 3GHz can execute 12 billion instructions per second (4 cores x 3GHz).

CPU Instruction Sets

• Definition — List of commands the CPU can process, each with a binary code (machine code).

  • Machine Code Components:

  • Opcode: Specifies the operation to carry out.

  • Operand: Indicates where to perform the operation.

• Compatibility:

  • A program compiled for one instruction set won't run on a processor with a different set (e.g., Intel vs. ARM).

Embedded Systems

• Definition:

  • Dedicated computer systems for specific functions inside larger devices.

• Examples:

  • Heating thermostats, hospital equipment, washing machines, dishwashers, coffee machines, satellite navigation, factory equipment, traffic lights.

• Properties:

  • Compact size, lower power consumption than general-purpose computers, and cost-effective operations.

• Advice:

  • Use standard examples for embedded systems in exam responses to align with marking schemes, avoiding unconventional examples that may not qualify.