fetch decode execute cycle notes (this is going to be fun)
The PC is loaded with 0
The value from the PC (0) is copied to the MAR
The data from the MAR (0) is sent across the address bus with the instruction to read the data sent across the control bus
The data from that location in memory (0) is sent down the data bus to the MDR
The PC is incremented by 1
The data is sent from the MDR to the CIR where it is split into the opcode and operand
This is sent to the CU to be decoded
Which registers are being used here will depend on the instruction currently being executed
if a value is being inputted (INP) the ACC will store the value
If a value is being outputted (OUT) this will be the value currently in the ACC
If a value is loaded from RAM (LDA) this will be sent across the data bus from RAM (in the address location in the MAR) to the MDR
If a value is to be stored (STA) it will take the value from the ACC, send it to the MDR and then send it across the data bus to RAM (to the address location in the MAR)
If the LMC code is to branch (BRA/BRZ/BRP) the comparison will take place in the ALU
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The PC is loaded with 0
The value from the PC (0) is copied to the MAR
The data from the MAR (0) is sent across the address bus with the instruction to read the data sent across the control bus
The data from that location in memory (0) is sent down the data bus to the MDR
The PC is incremented by 1
The data is sent from the MDR to the CIR where it is split into the opcode and operand
This is sent to the CU to be decoded
Which registers are being used here will depend on the instruction currently being executed
if a value is being inputted (INP) the ACC will store the value
If a value is being outputted (OUT) this will be the value currently in the ACC
If a value is loaded from RAM (LDA) this will be sent across the data bus from RAM (in the address location in the MAR) to the MDR
If a value is to be stored (STA) it will take the value from the ACC, send it to the MDR and then send it across the data bus to RAM (to the address location in the MAR)
If the LMC code is to branch (BRA/BRZ/BRP) the comparison will take place in the ALU
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