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Summary: STM32 PWM Configuration, Duty Cycle, and Related Concepts

This summary consolidates the concepts and details discussed regarding PWM configuration, the role of key registers, macros, and additional considerations such as the status register and the importance of the prescaler.

Key Components in STM32 PWM Configuration

  1. ARR (Auto-Reload Register)

Purpose: Sets the period of the timer, defining the PWM signal's period.

Example:  TIM3->ARR = 16 2048 - 1; sets the auto-reload value for the timer (16 bits 2048 Hz.

  1. PSC (Prescaler Register)

Purpose: Divides the input clock frequency to achieve the desired timer counting rate.

Function: The value in the PSC register determines the division factor (PSC+1)

Example: TIM3->PSC = 41016 - 1; sets the prescaler to divide the clock. 

(see PWM1)

  1. CCR (Capture/Compare Register)

Purpose: Defines the value at which the timer will change the output level, effectively setting the PWM duty cycle.

Example: TIM3->CCR1 = (TIM3->ARR + 1) * ((float)percent / 100); sets the duty cycle.

  1. Macros

MODIFY_REG: Modifies specific bits in a register.

SET_BIT: Sets specific bits in a register.

CLEAR_BIT: Clears specific bits in a register.

Example Usage:


MODIFY_REG(TIM3->CCMR1, TIM_CCMR1_OC1M, 6 << TIM_CCMR1_OC1M_Pos);

SET_BIT(TIM3->CCER, TIM_CCER_CC1E);

CLEAR_BIT(TIM3->SR, TIM_SR_UIF);

  1. Status Register (SR)

Purpose: Indicates various timer events and is used for handling interrupts.

Key Flags:

  • UIF (Update Interrupt Flag): Indicates a counter overflow.

  • CCxIF (Capture/Compare Interrupt Flag): Indicates a capture/compare event for channel x.

Example Handling:


if (TIM3->SR & TIM_SR_UIF) {

    CLEAR_BIT(TIM3->SR, TIM_SR_UIF);

}

if (TIM3->SR & TIM_SR_CC1IF) {

    CLEAR_BIT(TIM3->SR, TIM_SR_CC1IF);

}


DUTY CYCLE

Definition: The duty cycle of a PWM signal is the fraction or percentage of one period in which the signal is active (high).

Calculation: Duty Cycle = THighTHigh+ TLow 100 %

Example: For a PWM signal with a period of 10 ms:

  • 50% Duty Cycle: High for 5 ms, low for 5 ms.

  • 75% Duty Cycle: High for 7.5 ms, low for 2.5 ms.

  • 25% Duty Cycle: High for 2.5 ms, low for 7.5 ms.


Conclusion

The proper configuration of ARR, PSC, CCR, and handling the status register flags is essential for precise PWM signal generation. The duty cycle determines how long the signal stays high within each period, directly affecting applications such as motor control, LED dimming, and audio signal generation. By dividing the clock frequency using the prescaler, we can achieve practical and usable output frequencies, enhance timer resolution, and manage power consumption effectively.


Understanding Interrupts

Interrupts:

Interrupts in STM32 microcontrollers are signals generated by hardware or software events that require immediate attention from the processor. When an interrupt occurs, the processor temporarily stops executing the main program and transfers control to a special piece of code called an interrupt handler (or interrupt service routine, ISR). The interrupt handler then handles the event and allows the processor to resume the main program where it left off.

Interrupt Handler:

An interrupt handler is a function written by the programmer to respond to a specific interrupt request. In STM32 microcontrollers, interrupt handlers are written in C (or assembly, though less common) and are typically defined with a specific syntax and attributes recognized by the STM32 HAL (Hardware Abstraction Layer) or CMSIS (Cortex Microcontroller Software Interface Standard).

Steps to Implement Interrupts in STM32:

  1. Enable Interrupts: First, interrupts need to be enabled globally to allow the processor to respond to them. This is usually done using the __enable_irq() function or its equivalent.

  2. Configure Interrupts: Configure the specific peripheral or event to generate interrupts. This involves setting up registers in the STM32 peripheral to trigger interrupts under specific conditions (e.g., receiving data on a UART, a timer overflow, etc.).

  3. Write Interrupt Handler: Implement the interrupt handler function. In STM32, the handler function has a specific name and prototype that matches the interrupt it handles (e.g., void EXTI_IRQHandler(void) for external interrupts). This function typically starts with void and ends with void or an appropriate return type depending on the interrupt.

  4. Register Interrupt Handler: Link the interrupt handler function to the interrupt vector table. This table resides in a specific memory location and maps each interrupt source to its corresponding handler function.

  5. Enable Interrupt Sources: Enable the specific interrupt source(s) at the peripheral level. This is usually done by setting bits in the peripheral’s control registers.

Example:

Let’s consider enabling and handling an interrupt for a GPIO pin in STM32 using STM32Cube HAL (a commonly used abstraction layer for STM32 microcontrollers):


#include "stm32f4xx_hal.h"


// Define the interrupt handler

void EXTI0_IRQHandler(void)

{

    // Your interrupt handling code here

    HAL_GPIO_EXTI_IRQHandler(GPIO_PIN_0);

}


int main(void)

{

    HAL_Init(); // Initialize HAL

    // Other initialization code


    // Enable and configure EXTI interrupt for GPIO_PIN_0

    HAL_NVIC_SetPriority(EXTI0_IRQn, 0, 0);

    HAL_NVIC_EnableIRQ(EXTI0_IRQn);


    while (1)

    {

        // Main program loop

    }

}


In this example:

  • EXTI0_IRQHandler is the interrupt handler function for EXTI line 0 (GPIO_PIN_0).

  • HAL_NVIC_SetPriority sets the priority of the interrupt.

  • HAL_NVIC_EnableIRQ enables the interrupt in NVIC (Nested Vectored Interrupt Controller).

This is a basic overview of interrupts and interrupt handlers in STM32 microcontrollers. Understanding and effectively using interrupts is crucial for designing responsive and efficient embedded systems applications.



Definition

  • Interrupt: An interrupt is a signal to the processor from a hardware device, software, or internal mechanism indicating an event that needs immediate attention. When an interrupt occurs, the processor suspends its current activities, saves its state, and executes a function called an interrupt handler or interrupt service routine (ISR) to deal with the event.

Purpose

  • Handling Events: Interrupts allow the processor to respond promptly to events without continuously polling for them. This improves efficiency by allowing the processor to focus on tasks only when needed, rather than constantly checking for events.

Types of Interrupts

  1. External Interrupts:

    • Generated by external hardware devices (e.g., timers, GPIO pins, UART).

    • Examples: Button press, timer overflow, received data on UART.

  2. Internal Interrupts:

    • Generated by internal events within the processor or peripheral devices.

    • Examples: Timer overflow, DMA transfer complete.

Interrupt Process

  1. Interrupt Request (IRQ):

    • An event occurs that triggers an interrupt, such as a timer reaching its reload value or a GPIO pin changing state.

  2. Interrupt Controller:

    • The interrupt controller prioritizes interrupts and forwards them to the processor.

  3. Interrupt Service Routine (ISR):

    • The processor suspends its current task and executes the ISR associated with the interrupt.

    • The ISR performs specific actions to handle the event or condition that triggered the interrupt.

  4. Context Switching:

    • When an interrupt occurs, the processor saves its current state (registers, program counter) before executing the ISR.

    • After the ISR completes, the processor restores its previous state and resumes the interrupted task.

Handling Interrupts in STM32

  • Interrupt Vector Table: STM32 microcontrollers have a table that maps each interrupt request (IRQ) to its corresponding ISR.

ISR Implementation: You write ISR functions to handle specific interrupts. For example, to handle a timer interrupt:

void TIM3_IRQHandler(void) {

    if (TIM3->SR & TIM_SR_UIF) {

        // Handle timer overflow or update interrupt

        CLEAR_BIT(TIM3->SR, TIM_SR_UIF); // Clear interrupt flag

    }

    // Additional handling for other flags (e.g., capture/compare)

}

Enabling and Disabling Interrupts: You configure interrupts by enabling them in peripheral registers and the NVIC (Nested Vectored Interrupt Controller).

NVIC_EnableIRQ(TIM3_IRQn); // Enable timer 3 interrupt in NVIC

SET_BIT(TIM3->DIER, TIM_DIER_UIE); // Enable timer update interrupt

Benefits of Interrupts

  • Efficiency: Allows the processor to respond immediately to events without wasting cycles polling for them.

  • Real-Time Responsiveness: Essential for time-sensitive applications like control systems and communication protocols.

  • Modularity: Simplifies program structure by separating event-driven tasks from main program flow.

Considerations

  • Priority: Interrupts can have different priorities to ensure critical tasks are handled first.

  • Interrupt Latency: Time between an event and the start of the ISR execution should be minimized for time-critical applications.

Conclusion

Interrupts are fundamental in embedded systems like STM32 microcontrollers, enabling efficient event handling and real-time responsiveness. They allow the processor to respond promptly to external and internal events, enhancing system performance and modularity. Properly configuring and managing interrupts is crucial for developing robust and responsive embedded applications.