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Machine learning 

Advantages of High  Level Languages

•Program development is faster

•Programs are easier to maintain

•Programs are portable

Machine Language

–Native language of computer

–0s and 1s based on the flow of current

–CPU specific

–Direct  access to the hardware

–Requires no translator

Sample Instruction

Machine Language

Machine Language cont…

Reading Machine Language

•first nine bits specifies the operation, last 6

•(or 7) bits specifies the arguments:

•1000000100100101                Load Memory 5 --> R1

•1000000101000101                Load Memory 5 --> R2

•1010000100000110                 R1 + R2 --> R0

•1000001000000110                Store R0 -->

Merit and Demerit of ML

•Merit

–Efficient use of computer  resources

–Fast

•demerit

–Tedious and cumbersome

–Prone to error

–Time consuming

–Expensive  preparation and debugging

Assembly Language

•Machine Language      Equivalent Assembly

•1000000100100101     LOAD R1, 5

•1000000101000101     LOAD R2, 5

•1010000100000110     ADD R0, R1, R2

•1000001000000110     SAVE R0, 6

•1111111111111111      HALT

Assembly language

•Assembler: converts source code programs from assembly language to machine language

•Linker: combines individual files created by an assembler into a single executable program

•Debugger: allows you to step through a program while it is running and examine registers and memory

Reasons for assembly language programming:

•Two major reasons:

•Efficiency  (space and time) and accessibility to system hardware.

Time efficiency

–Time convenience applications (to improve performance, e.g graphic package:

–Time critical applications (real-time applications) e.g aircraft navigation systems, process control systems, robot control software, communication software, target acquisition (eg missile tracking) software

Accessibility to hardware: system software requires direct control of hardware, e.g OS, assembler, compiler, linker, loader, device drivers, network interfaces, video games is an example of applications that require hardware control

Space efficiency: important in portable and handheld devices, and spacecraft control system.

Reasons for learning assembly language:

•It is useful in writing embedded programs.

•direct access to computer hardware

•understanding of the interaction between computer hardware, operating systems and application programs.

•device drivers

•subroutines

Applications

•Hardware device driver

•Embedded systems

•Computer games requiring

Machine Language


Assembly Language

Machine language is only understood by the computers.

Assembly language is only understood by human beings not by the computers.

In machine language data only represented with the help of binary format(0s and 1s), hexadecimal and octadecimal.

In assembly language data can be represented with the help of mnemonics such as Mov, Add, Sub, End etc.

Machine language is very difficult to understand by the human beings.

Assembly language is easy to understand by the human being as compare to machine language.

Modifications and error fixing cannot be done in machine language.

Modifications and error fixing can be done in assembly language.

Machine language is very difficult to memorize so it is not tedious to learn the machine language.

Easy to memorize the assembly language because some alphabets and mnemonics are used.

Execution is fast in machine language because all data is already present in binary format.

Execution is slow as compared to machine language.

There is no need of translator. The machine understandable form is the machine language.

Assembler is used as translator to convert mnemonics into machine understandable form.

Machine language is hardware dependent.

Assembly language is the machine dependent and it is not portable.

Intel Microprocessors

•Intel introduced the 8086 microprocessor in 1979

•8086, 8087, 8088, and 80186 processors

–16-bit processors with 16-bit registers

–16-bit data bus and 20-bit address bus

•Physical address space = 220 bytes = 1 MB

–8087 Floating-Point co-processor

–Uses segmentation and real-address mode to address memory

•Each segment can address 216 bytes = 64 KB

–8088 is a less expensive version of 8086

•Uses an 8-bit data bus

–80186 is a faster version of 8086

Intel 80286 and 80386 Processors

•80286 was introduced in 1982

–24-bit address bus  224 bytes = 16 MB address space

–Introduced protected mode

•Segmentation in protected mode is different from the real mode

•80386 was introduced in 1985

–First 32-bit processor with 32-bit general-purpose registers

–First processor to define the IA-32 architecture

–32-bit data bus and 32-bit address bus

–232 bytes  4 GB address space

–Introduced paging, virtual memory, and the flat memory model

•Segmentation can be turned off

Intel 80486 and Pentium Processors

•80486 was introduced 1989

–Improved version of Intel 80386

–On-chip Floating-Point unit (DX versions)

–On-chip unified Instruction/Data Cache (8 KB)

–Uses Pipelining: can execute up to 1 instruction per clock cycle

•Pentium (80586) was introduced in 1993

–Wider 64-bit data bus, but address bus is still 32 bits

–Two execution pipelines: U-pipe and V-pipe

•Superscalar performance: can execute 2 instructions per clock cycle

–Separate 8 KB instruction and 8 KB data caches

–MMX instructions (later models) for multimedia applications

Intel P6 Processor Family

•P6 Processor Family: Pentium Pro, Pentium II and III

•Pentium Pro was introduced in 1995

–Three-way superscalar: can execute 3 instructions per clock cycle

–36-bit address bus  up to 64 GB of physical address space

–Introduced dynamic execution

•Out-of-order and speculative execution

–Integrates a 256 KB second level L2 cache on-chip

•Pentium II was introduced in 1997

–Added MMX instructions (already introduced on Pentium MMX)

•Pentium III was introduced in 1999

–Added SSE instructions and eight new 128-bit XMM registers

Pentium 4 and Xeon Family

•Pentium 4 is a seventh-generation x86 architecture

–Introduced in 2000

–New micro-architecture design called Intel Netburst

–Very deep instruction pipeline, scaling to very high frequencies

–Introduced the SSE2 instruction set (extension to SSE)

•Tuned for multimedia and operating on the 128-bit XMM registers

•In 2002, Intel introduced Hyper-Threading technology

–Allowed 2 programs to run simultaneously, sharing resources

•Xeon is Intel's name for its server-class microprocessors

–Xeon chips generally have more cache

–Support larger multiprocessor configurations

Pentium-M and EM64T

•Pentium M (Mobile) was introduced in 2003

–Designed for low-power laptop computers

–Modified version of Pentium III, optimized for power efficiency

–Large second-level cache (2 MB on later models)

–Runs at lower clock than Pentium 4, but with better performance

•Extended Memory 64-bit Technology (EM64T)

–Introduced in 2004

–64-bit superset of the IA-32 processor architecture

–64-bit general-purpose registers and integer support

–Number of general-purpose registers increased from 8 to 16

–64-bit pointers and flat virtual address space

–Large physical address space: up to 240 = 1 Terabytes

IA-32 Processor Architecture

• modes of operation

–Protected mode

–virtual –

–Real addressing mode

–System management mode

Modes of Operation

•Real-Address mode (original mode provided by 8086)

–Only 1 MB of memory can be addressed, from 0 to FFFFF (hex)

–Programs can access any part of main memory

–MS-DOS runs in real-address mode

•Protected mode (introduced with the 80386 processor)

–Each program can address a maximum of 4 GB of memory

–The operating system assigns memory to each

Real Address Mode

•A program can access up to six segments at any time

–Code segment

–Stack segment

–Data segment

–Extra segments (up to 3)

•Each segment is 64 KB

•Logical address

–Segment = 16 bits

–Offset = 16 bits

•Linear (physical) address = 20 bits

Protected Mode Architecture

•Logical address consists of

–16-bit segment selector (CS, SS, DS, ES, FS, GS)

–32-bit offset (EIP, ESP, EBP, ESI ,EDI, EAX, EBX, ECX, EDX)

•Segment unit translates logical address to linear address

–Using a segment descriptor table

–Linear address is 32 bits (called also a virtual address)

•Paging unit translates linear address to physical address

–Using a page directory and a page table

ntent • arithmetic and logical operations ●Control and System flags ●Control the CPU operation ●Programs can set and clear individual bits in the EFLAGS register

Machine learning 

Advantages of High  Level Languages

•Program development is faster

•Programs are easier to maintain

•Programs are portable

Machine Language

–Native language of computer

–0s and 1s based on the flow of current

–CPU specific

–Direct  access to the hardware

–Requires no translator

Sample Instruction

Machine Language

Machine Language cont…

Reading Machine Language

•first nine bits specifies the operation, last 6

•(or 7) bits specifies the arguments:

•1000000100100101                Load Memory 5 --> R1

•1000000101000101                Load Memory 5 --> R2

•1010000100000110                 R1 + R2 --> R0

•1000001000000110                Store R0 -->

Merit and Demerit of ML

•Merit

–Efficient use of computer  resources

–Fast

•demerit

–Tedious and cumbersome

–Prone to error

–Time consuming

–Expensive  preparation and debugging

Assembly Language

•Machine Language      Equivalent Assembly

•1000000100100101     LOAD R1, 5

•1000000101000101     LOAD R2, 5

•1010000100000110     ADD R0, R1, R2

•1000001000000110     SAVE R0, 6

•1111111111111111      HALT

Assembly language

•Assembler: converts source code programs from assembly language to machine language

•Linker: combines individual files created by an assembler into a single executable program

•Debugger: allows you to step through a program while it is running and examine registers and memory

Reasons for assembly language programming:

•Two major reasons:

•Efficiency  (space and time) and accessibility to system hardware.

Time efficiency

–Time convenience applications (to improve performance, e.g graphic package:

–Time critical applications (real-time applications) e.g aircraft navigation systems, process control systems, robot control software, communication software, target acquisition (eg missile tracking) software

Accessibility to hardware: system software requires direct control of hardware, e.g OS, assembler, compiler, linker, loader, device drivers, network interfaces, video games is an example of applications that require hardware control

Space efficiency: important in portable and handheld devices, and spacecraft control system.

Reasons for learning assembly language:

•It is useful in writing embedded programs.

•direct access to computer hardware

•understanding of the interaction between computer hardware, operating systems and application programs.

•device drivers

•subroutines

Applications

•Hardware device driver

•Embedded systems

•Computer games requiring

Machine Language


Assembly Language

Machine language is only understood by the computers.

Assembly language is only understood by human beings not by the computers.

In machine language data only represented with the help of binary format(0s and 1s), hexadecimal and octadecimal.

In assembly language data can be represented with the help of mnemonics such as Mov, Add, Sub, End etc.

Machine language is very difficult to understand by the human beings.

Assembly language is easy to understand by the human being as compare to machine language.

Modifications and error fixing cannot be done in machine language.

Modifications and error fixing can be done in assembly language.

Machine language is very difficult to memorize so it is not tedious to learn the machine language.

Easy to memorize the assembly language because some alphabets and mnemonics are used.

Execution is fast in machine language because all data is already present in binary format.

Execution is slow as compared to machine language.

There is no need of translator. The machine understandable form is the machine language.

Assembler is used as translator to convert mnemonics into machine understandable form.

Machine language is hardware dependent.

Assembly language is the machine dependent and it is not portable.

Intel Microprocessors

•Intel introduced the 8086 microprocessor in 1979

•8086, 8087, 8088, and 80186 processors

–16-bit processors with 16-bit registers

–16-bit data bus and 20-bit address bus

•Physical address space = 220 bytes = 1 MB

–8087 Floating-Point co-processor

–Uses segmentation and real-address mode to address memory

•Each segment can address 216 bytes = 64 KB

–8088 is a less expensive version of 8086

•Uses an 8-bit data bus

–80186 is a faster version of 8086

Intel 80286 and 80386 Processors

•80286 was introduced in 1982

–24-bit address bus  224 bytes = 16 MB address space

–Introduced protected mode

•Segmentation in protected mode is different from the real mode

•80386 was introduced in 1985

–First 32-bit processor with 32-bit general-purpose registers

–First processor to define the IA-32 architecture

–32-bit data bus and 32-bit address bus

–232 bytes  4 GB address space

–Introduced paging, virtual memory, and the flat memory model

•Segmentation can be turned off

Intel 80486 and Pentium Processors

•80486 was introduced 1989

–Improved version of Intel 80386

–On-chip Floating-Point unit (DX versions)

–On-chip unified Instruction/Data Cache (8 KB)

–Uses Pipelining: can execute up to 1 instruction per clock cycle

•Pentium (80586) was introduced in 1993

–Wider 64-bit data bus, but address bus is still 32 bits

–Two execution pipelines: U-pipe and V-pipe

•Superscalar performance: can execute 2 instructions per clock cycle

–Separate 8 KB instruction and 8 KB data caches

–MMX instructions (later models) for multimedia applications

Intel P6 Processor Family

•P6 Processor Family: Pentium Pro, Pentium II and III

•Pentium Pro was introduced in 1995

–Three-way superscalar: can execute 3 instructions per clock cycle

–36-bit address bus  up to 64 GB of physical address space

–Introduced dynamic execution

•Out-of-order and speculative execution

–Integrates a 256 KB second level L2 cache on-chip

•Pentium II was introduced in 1997

–Added MMX instructions (already introduced on Pentium MMX)

•Pentium III was introduced in 1999

–Added SSE instructions and eight new 128-bit XMM registers

Pentium 4 and Xeon Family

•Pentium 4 is a seventh-generation x86 architecture

–Introduced in 2000

–New micro-architecture design called Intel Netburst

–Very deep instruction pipeline, scaling to very high frequencies

–Introduced the SSE2 instruction set (extension to SSE)

•Tuned for multimedia and operating on the 128-bit XMM registers

•In 2002, Intel introduced Hyper-Threading technology

–Allowed 2 programs to run simultaneously, sharing resources

•Xeon is Intel's name for its server-class microprocessors

–Xeon chips generally have more cache

–Support larger multiprocessor configurations

Pentium-M and EM64T

•Pentium M (Mobile) was introduced in 2003

–Designed for low-power laptop computers

–Modified version of Pentium III, optimized for power efficiency

–Large second-level cache (2 MB on later models)

–Runs at lower clock than Pentium 4, but with better performance

•Extended Memory 64-bit Technology (EM64T)

–Introduced in 2004

–64-bit superset of the IA-32 processor architecture

–64-bit general-purpose registers and integer support

–Number of general-purpose registers increased from 8 to 16

–64-bit pointers and flat virtual address space

–Large physical address space: up to 240 = 1 Terabytes

IA-32 Processor Architecture

• modes of operation

–Protected mode

–virtual –

–Real addressing mode

–System management mode

Modes of Operation

•Real-Address mode (original mode provided by 8086)

–Only 1 MB of memory can be addressed, from 0 to FFFFF (hex)

–Programs can access any part of main memory

–MS-DOS runs in real-address mode

•Protected mode (introduced with the 80386 processor)

–Each program can address a maximum of 4 GB of memory

–The operating system assigns memory to each

Real Address Mode

•A program can access up to six segments at any time

–Code segment

–Stack segment

–Data segment

–Extra segments (up to 3)

•Each segment is 64 KB

•Logical address

–Segment = 16 bits

–Offset = 16 bits

•Linear (physical) address = 20 bits

Protected Mode Architecture

•Logical address consists of

–16-bit segment selector (CS, SS, DS, ES, FS, GS)

–32-bit offset (EIP, ESP, EBP, ESI ,EDI, EAX, EBX, ECX, EDX)

•Segment unit translates logical address to linear address

–Using a segment descriptor table

–Linear address is 32 bits (called also a virtual address)

•Paging unit translates linear address to physical address

–Using a page directory and a page table

ntent • arithmetic and logical operations ●Control and System flags ●Control the CPU operation ●Programs can set and clear individual bits in the EFLAGS register