T00H-Page Tables - Tagged

Page Table Tutorial

Introduction

• Overview of memory management in the POWER architecture.

Problem Statement

• Process Details:

  • Code Segment: Starts at 0x10000000, Size: 182KB

  • Data Segment: Starts at 0xc000000000, Size: 6284KB

  • Stack Segment: Starts at 0xf0000000000, Size: 386KB

• Architecture Specifications:

  • Physical Address Space: 44 bits

  • Page Size: 4KB

• Questions:

  • Q1: Maximum number of entries in the page table?

  • Q2: Maximum size of the page table with 8 protection bits?

  • Q3: Segment numbers of code, data, and stack segments?

  • Q4: How many entries will this process consume in the page table?

  • Q5: End address of a segment in virtual space with address 0xa400000000000.

Memory Architecture

Effective Address Structure

• The POWER architecture uses a paged segmentation memory architecture.

• Effective Address: 64 bits, divided into segment number and offset.

• Segment number indexes into a 256-entry CAM (STLB).

Answers to Questions

Q1: Maximum Number of Entries in the Page Table

• Inverted Page Table:

  • 44-bit physical space and 12 for page size:

  • Calculation: 2^(44-12) = 2^32 = 232 entries.

  • Note: Actual size depends on installed memory (e.g., 16GB yields 2^(34-12) = 2^22 = 222 entries).

Q2: Maximum Size of the Page Table

• Entry Size Calculation:

  • Each entry: 80 bits (virtual address) - 12 bits (page offset) = 68 bits

  • Adding 8 bits for protection: 76 bits

  • Round to byte boundary: 10 bytes

• Maximum Size Calculation:

  • 10 bytes x 232 entries = 40GB for a 16TB system

  • Overhead: 0.2% of total installed memory.

  • Space efficiency of inverted page tables.

Q3: Segment Numbers

• Segment Numbers:

  • Code Segment: 1

  • Data Segment: c00

  • Stack Segment: efff

Q4: Number of Entries Consumed by the Process

• Segment Sizes:

  • Code: 182KB

  • Data: 6284KB

  • Stack: 386KB

• Page Calculation:

  • Code: 45.5 → 46 pages

  • Data: 1571 pages

  • Stack: 96.5 → 97 pages

• Total Entries:

  • Total = 46 + 1571 + 97 = 1714 entries

Q5: Last Virtual Address in Code Segment

• Base Address for Code Segment: entry 1: 0xa400000000000

• Last Address Calculation:

  • Last Address = 0xa400000000000 + 0x2D800 (size of segment in hex)

  • Result: 0xa400000002D800

Rounding Up and Down

Address Boundary Considerations

• Code and Data Segments must have their end address rounded up to the next page boundary.

• Stack Segment's start address should be rounded down to current page address.

• Confirm all computed addresses are aligned at page addresses.

Here are some similar practice questions related to memory management and the POWER architecture:

1. Calculate the total number of bytes required for the page table if the system has 32GB of physical memory.

2. Determine the maximum number of entries in the page table if the page size is increased to 8KB.

3. Given a process with a code segment size of 256KB, how many pages will it occupy?

4. What is the end address in virtual space for the stack segment if it starts at 0xf0000000000?

5. If a data segment starts at 0xc000000000 and occupies 1MB, what will be the last address of this segment?

6. How would the maximum size of the page table change if the protection bits were increased to 12?

7. Calculate the total entries consumed by a process with a stack segment of 1024KB.

8. What alignment must be utilized for segments starting at a specific address in terms of page size?

9. If the system has 128GB of physical memory, what is the maximum number of entries in the inverted page table?

10. Discuss the implications of increasing the page size on page table entries and memory management efficiency.