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COMP-1200 Combinational Logic Notes

Course Overview

Course Code: COMP-1200
Semester: Spring 2025
Institution: Wentworth Institute of Technology
Instructors: Prof. Gyllinsky, Prof. Park, Prof. Firouzbakht, Prof. Anwaruddinta, and others

Combinational Logic Basics

Combinational Logic Circuits

  • These circuits are designed such that the output is solely determined by the current values of the input signals.

  • They do not take into account any historical values or past input states, meaning they are stateless.

  • Examples include adders, multiplexers, and encoders, which perform specific logical operations based on their current inputs.

Sequential Logic Circuits

  • In contrast, sequential logic circuits consider both current and past input states, making them dependent on the sequence of inputs received.

  • They utilize memory elements such as flip-flops to store past information, allowing them to retain the effect of previous inputs.

  • Common applications include counters, registers, and state machines.

Logical Functions and Their Representations

  • A logical function can be represented in multiple forms, each of which provides the same functional outcome:

    • Logic Circuit: A graphical representation using logic gates like AND, OR, NOT, etc.

    • Truth Table: A tabular representation that outlines all possible input combinations and their corresponding outputs.

    • Logic Expression: An algebraic representation showing the relationship between the inputs and outputs using logical operators.

  • All forms are equivalent in functionality, providing diverse ways to analyze and implement logic functions effectively.

Logic Gates: Basic Notations

  • AND (⋅)

    • Represents conjunction; the output is true only if both inputs are true. Sample representation: A AND B can be simplified to A ⋅ B.

  • OR (+)

    • Represents disjunction; the output is true if at least one input is true. It is expressed as A + B.

  • NOT (') or Overbar

    • Represents negation, where the output is the inverse of the input. For instance, NOT A is noted as A'.

  • XOR (⊕)

    • Stands for Exclusive OR; the output is true if exactly one of the inputs is true, denoted as A XOR B, or A ⊕ B.

Logic Operations Precedence

  • Proper use of parentheses is essential for ensuring the intended operations are conducted correctly.

  • The precedence of operations is as follows:

    1. NOT

    2. AND

    3. OR

  • Expression equivalence examples provide clarification on how operations can be restructured without changing their overall result.

Logic Function Example

A

B

C

Q

0

0

0

1

0

1

0

1

1

0

1

0

1

1

1

0

Decoders

  • n-to-2^n Decoder

    • Accepts n binary inputs and produces 2^n unique outputs.

    • Enables the selection of a specific output wire based on the binary input value, allowing for precise control in digital circuits.

  • Use Cases:

    • Traffic signal management systems that activate only the appropriate signal light based on the input.

    • Converting memory address inputs into control signals for selecting various opcodes in microprocessors.

Multiplexers (MUX)

  • Configuration:

    • A multiplexer has 2ⁿ data inputs and a single output.

    • An n-bit selector is utilized to determine which input to forward to the output.

  • Operational Logic:

    • If the selector (SEL) input is 0, the output directly corresponds to Input0; if SEL = 1, the output corresponds to Input1.

Adders

  • Half Adder

    • It accepts 2 binary inputs (A and B) and produces two outputs: Sum and Carry-out, like binary addition.

  • Full Adder

    • This expands the functionality of the half adder by incorporating a Carry-in (Cin) input.

    • It is formulated as having 3 inputs (A, B, Cin) to produce 2 outputs (Sum S, Carry-out Cout).

    • Full adders are essential for performing addition on multi-bit binary numbers.

  • 4-bit Ripple-Carry Adder

    • This circuit adds two sets of 4 bits (designated A[3:0] and B[3:0]), producing a 4-bit output (S[3:0]) and a single Carry-out (Cout).

Propagation Delay

  • Delays are intrinsic to logic gate operations, typically ranging from 10 picoseconds to 100 picoseconds depending on the technology used.

  • A specific delay example provides clarity on how these delays affect output response timing and overall system performance.

Overflow in Signed Adders

  • Conditions to detect overflow in 4-bit signed addition processes include:

    • If the carry input (Cin) to a binary addition is 0 and the carry-out (Cout) is 1, overflow occurs.

    • Alternatively, if Cin = 1 and Cout = 0, overflow is also detected, leading to incorrect result representation.

Boolean Algebra Fundamentals

  • Complement Rules

    • Fundamental rules include: A + A' = 1 and A ⋅ A' = 0, which are foundational to simplifying Boolean expressions.

  • OR Rules

    • Important rules include: A + 1 = 1, A + 0 = A, and A + A = A.

  • AND Rules

    • Essential rules are: A ⋅ 1 = A, A ⋅ 0 = 0, and A ⋅ A = A.

  • Distributive Laws apply, providing additional support for simplifying complex logical expressions.

Steps for Converting Truth Tables to Expressions

  1. For each row where the output (Q) is true (1), formulate a corresponding Boolean expression based on the input variables.

  2. Combine these expressions using logical ORs to construct a comprehensive Sum of Products (SOP) expression, illustrating the logical relationship.

Minimizing Logic Expressions

  • This process employs various Boolean algebra rules to simplify complex logical expressions, which enhances the efficiency of implementation, reduces resource costs, and improves operational speed.

  • A number of simplification techniques and rules such as Absorption and DeMorgan's Law are beneficial for both minimization and deeper understanding of logical relationships.

Future Topics

  • The course will extend into detailed discussions on information representation and further investigations into digital logic systems, encompassing logic gates, K-maps, and advanced logic design methodologies.