In-Depth Notes on Control Unit and MARIE Architecture

Control Unit Operations

  • The control unit of a computer ensures sequential execution of instructions.
  • It manages the flow of data to correct components.

Implementation of Control Units

  • There are two main types of control units:
    • Hardwired Control: Utilizes digital logic components to route data precisely at appropriate times.
    • Microprogrammed Control: Uses a microcontroller with a program stored in ROM, which details the Register Transfer Language (RTL) for each instruction.

MARIE Architecture

  • MARIE uses a hardwired control implementation.
  • Operations are dictated by the RTL corresponding to each instruction.
  • Example for ADD instruction (RTL):
    MAR ← X
    MBR ← M[MAR]
    AC ← AC + MBR

Register Addressing

  • Each register within MARIE has a unique address, determined by control unit signals.
  • Requires 3 signals to identify addresses ranging from 0 to 7.
  • Unlike other machines which may need 8 signals, MARIE efficiently uses 3.

Control Signals in MARIE CPU

  • The MARIE CPU features two sets of signals:
    • Signal Set 1 (P0 - P2): Determines components for data reads.
    • Signal Set 2 (P3 - P5): Identifies components for data writes.

Memory Buffer Register (MBR) Example

  • MBR has the address 3 and is a 12-bit register.
  • Built using D flip-flops:
    • Data flows into MBR when P3 and P4 are high.
    • Data flows out when P0 and P1 are active.

Execution of Instructions

  • For the first RTL line of ADD:
    • The IR contains address X in the rightmost 12 bits.
    • Copies X from IR to MAR by raising appropriate signals:
    • Signals P0, P1, and P2 to read from IR.
    • Signal P3 to write X to MAR.
    • MAR has address 1 and IR address is 7.

Clock Control and Timing Signals

  • Instructions typically require multiple clock ticks (1 for each line of RTL).
  • MARIE can have a maximum of 3 lines of RTL per instruction (7 if advanced instructions are included).
  • Uses 4 timing signals (8 for advanced): T0, T1, T2… T7.
    • A counter resets using the Cr signal.

ALU Operations

  • ALU supports basic operations:
    • Add (A0)
    • Subtract (A1)
    • Clear (A2)
    • A3 is not used (no operation).
  • ALU signal activation dictates the operation executed by the ALU.

Control Signal Overview

  • Control signal framework includes:
    • Register controls: P0 to P5
    • ALU controls: A0 to A3
    • Timing signals: T0 to T7 and reset signal Cr.

Signal Sequence for ADD

  • The sequence of control signals for the ADD instruction:
    • T0: MAR ← X (P2, P1, P0 high)
    • T1: MBR ← M[MAR] (P4, P3 high)
    • T2: AC ← AC + MBR (A0 high)
    • T3: Reset counter (Cr high).

Timing Diagram

  • Visual representation of signal activation over clock ticks (C0 to C3).
  • Indicates which signals are high during each clock tick relevant to the execution of instructions.

Summary of Control Logic

  • Control logic remains consistent across hardwired and microprogrammed systems, except that hardwired directly uses combinational logic based on instruction bit patterns.

Additional Considerations

  • Complex instruction sets may require additional control for operations like shifting or multiplication.
  • Functionality enhancement could involve incorporating shifters for these operations.