Lecture_7-CSCI_U310_01-Jahangir_Majumder-Spring_2025

Course Information

  • Course Title: CSCI U310 01 Introduction to Computer Architecture

  • Instructor: AKM Jahangir A Majumder, PhD

  • Term: Spring 2025

  • Lecture Date: February 4, 2025

  • Notes: Some slides are adapted from previous instructors; figures sourced from the textbook.

Lecture Overview

  • Topics Covered:

    • Multiplication and Division

    • Algorithms

    • Hardware

    • MIPS/RISC-V Instructions

    • Floating Point

  • Assignments:

    • Homework 2 posted on Blackboard, due today

  • Upcoming Assessments:

    • Quiz 2 on Thursday, February 6, covering lectures 3-5

Review: Multiplication Hardware

  • Initial Setup:

    • Multiplier initialized to 1

    • Check Multiplier:

      • If multiplier is zero, skip addition

    • 32 repetitions of the process

  • Procedure:

    1. Add multiplicand to product, store in Product register

    2. Shift Multiplicand left 1 bit

    3. Shift Multiplier right 1 bit

    • Repeat for 32 cycles

  • Datapath:

    • Includes ALU and registers: 64-bit Product, 32-bit Multiplier, control for operations

Review: Optimize Multiplication Hardware

  • Optimized Setup:

    • 32-bit ALU and registers optimized for 64-bit products

    • Increased efficiency through control mechanisms for shifting and writing

Optimized Multiplication Algorithm

  • Core Steps:

    • Initialize Multiplier (right half of product)

    • Test Multiplier:

      • If zero, skip addition

      • Otherwise:

        1. Add multiplicand to product

        2. Shift Multiplicand and Multiplier left/right as needed

    • Loop for 32 repetitions

Faster Multiplication Techniques

  • Enhanced Performance:

    • Implementing multiple adders increases speed

    • Designs can be pipelined, supporting multiple concurrent multiplications

    • Cost/performance tradeoff considerations

Signed Integer Multiplication

  • Handling Signed Integers:

    • Convert multiplicands to positive values

    • Determine sign bit after calculation

Comparison of Unsigned and Twos Complement Integers

  • Example:

    • Unsigned vs. Twos Complement operations illustrated with binary multiplication

    • Key comparison of results between signed and unsigned integers

Multiplication of Two Unsigned 4-Bit Integers Yielding an 8-Bit Result

  • Example Calculation:

    • Illustrated multiplication of binary numbers with breakdown of results at each step

MIPS/RISC-V Multiplication

  • Register Considerations:

    • Two 32-bit registers to hold the product (HI for most significant, LO for least significant)

  • Instructions:

    • mult and multu for multiplication operations

    • mfhi and mflo for accessing product portions

  • Note on Overflow:

    • Test HI register to check for overflow beyond 32 bits

Review of Integer Multiplication

  • Programming Example:

    • Java: a = b * c

    • RISC-V translation with registers

    • MIPS implementation details provided

Summary

  • Completion of Multiplication Coverage:

    • Transitioning to next topics: Division and Floating Point arithmetic.