machine-instruction-cycle-cpu-components-study-guide
Machine Instruction Cycle & CPU Components Study Guide
Fetch-Decode-Execute Cycle
The fundamental process by which all CPUs use to carry out instructions from a program.
Fetch
The stage of the cycle where the CPU retrieves the next instruction from memory.
Decode
The stage of the cycle where the CPU interprets the instruction to determine the operation to be performed and any operands.
Execute
The stage of the cycle where the CPU performs the operation specified by the instruction.
CPU (Central Processing Unit)
The core of a computer, responsible for executing instructions.
Memory
A component that stores data and instructions.
Registers
Small, high-speed storage locations within the CPU.
Program Counter (PC)
A register that stores the memory address of the next instruction to be fetched.
Memory Address Register (MAR)
A register that stores the memory address being accessed.
Memory Data Register (MDR)
A register that temporarily stores data being read from or written to memory.
Instruction Register (IR)
A register that holds the current instruction being decoded.
Control Unit (CU)
The part of the CPU that interprets instructions and generates control signals.
Arithmetic Logic Unit (ALU)
The part of the CPU that performs arithmetic and logical operations.
Address Bus
A unidirectional bus that carries memory addresses from the CPU to memory.
Data Bus
A bidirectional bus that carries data between the CPU and memory/registers.
Control Bus
A bus that carries control signals from the CU to memory and other components.
Operands
The data or addresses that the operation will use.
Data Bus
Carries the instruction from RAM to the MDR during the fetch stage and carries data between the CPU (registers, ALU) and memory during the execute stage. This is a bidirectional bus (two-way).
Control Bus
Carries control signals from the CU to memory and other components throughout the cycle, including signals like 'read,' 'write,' and 'fetch.' It can be unidirectional or bidirectional, depending on the specific control signal.
Fetch-decode-execute cycle
The core process by which CPUs execute instructions.
Program Counter (PC)
Stores the address of the next instruction.
Memory Address Register (MAR)
Holds the memory address being accessed.
Memory Data Register (MDR)
Temporarily stores data or instructions fetched from or written to memory.
Instruction Register (IR)
Holds the instruction currently being executed.
Control Unit (CU)
Decodes instructions and sends control signals.
Arithmetic Logic Unit (ALU)
Performs calculations and logical operations.
Buses
Communication channels within the computer system that transfer data, addresses, and control signals.
Address Bus
A one-way bus that carries memory addresses from the CPU to memory.
Co-processor
A specialized processor that assists the main CPU with specific tasks to improve overall efficiency.
CPU (Central Processing Unit)
The 'brain' of the computer, responsible for executing instructions and performing calculations.
Floating-Point Unit (FPU)
A co-processor specialized in performing floating-point calculations.
Graphics Processing Unit (GPU)
A co-processor specialized in graphics processing tasks.
Multi-core processor
A type of processor that has multiple CPU cores, each capable of handling its own thread for parallel processing.
Registers
Small, high-speed memory locations within the CPU that temporarily store data and instructions.
Single-core processor
A processor with only one CPU core, capable of handling one thread at a time.
Arithmetic Logic Unit (ALU)
Responsible for performing arithmetic operations (addition, subtraction, multiplication, division) and logical operations (AND, OR, NOT, comparisons).
Control Unit (CU)
Described as the 'conductor' of the CPU orchestra, it fetches instructions from memory, decodes them, and controls the CPU's and other components' data flow.
Instruction Register (IR)
Holds the current instruction being executed.
Program Counter (PC)
Stores the memory address of the next instruction to be fetched.
Memory Address Register (MAR)
Holds the memory address of the data being accessed.
Memory Data Register (MDR)
Holds the data being read from or written to memory.
Accumulator (AC)
A general-purpose register for storing intermediate results during calculations.
Interaction of CPU Components
The CPU's operation is a result of the interaction between these components, involving fetching, decoding, and executing instructions.
Buses
Communication pathways within the CPU and between the CPU and other components.
Address Bus
Carries memory addresses from the CPU to memory (one-way).
Data Bus
Carries data between the CPU and memory (bi-directional).
Control Bus
Carries control signals from the CU to other components (either one-way or bi-directional).
Multi-core processor
Has multiple CPU cores, enabling parallel processing and improved performance.
Co-processor
A specialized processor (like a GPU) that assists the main CPU with specific tasks, offloading work from the main CPU, improving overall efficiency.
CPU Diagram
Illustrates the relationship between the main CPU components, registers, and buses, highlighting its importance for understanding the CPU's architecture.
The CPU
Described as 'the brain' of the computer, responsible for executing instructions and processing data.
Key Functions of ALU
Performs arithmetic operations (addition, subtraction, multiplication, division) and logical operations (AND, OR, NOT, comparisons).
Key Functions of Control Unit
Fetches instructions from memory, decodes them, and controls the CPU's and other components' data flow.
Registers as Scratchpad
Registers are referred to as the 'CPU's scratchpad.'
Program Counter Function
Stores the memory address of the next instruction to be fetched.
Buses as Communication Pathways
Buses are described as communication pathways within the CPU and between the CPU and other components.
Multi-core Processor Functionality
Has multiple CPU cores, each capable of handling its own thread, allowing for parallel processing and improved performance.
Co-processor Functionality
Assists the main CPU with specific tasks, offloading work from the main CPU, improving overall performance.