Intro to Computer Organization Fall 2024 Control Flow

VT VIRGINIA TECH Logical and Control Flow Instructions

  • Instructor: Dimitrios Nikolopoulos

1. What We Have Learned So Far

  • Addition/Subtraction:

    • add rd, rs1, rs2: R[rd] = R[rs1] + R[rs2]

    • sub rd, rs2, rs1: R[rd] = R[rs1] – R[rs2]

  • Addition with Immediate Operand:

    • addi rd, rs1, imm: R[rd] = R[rs1] + imm

  • Memory Accesses:

    • Instructions include: lw, sw, lh, sh, lb, sb, lhu, lbu

    • Notation of instruction semantics is used in RISC-V (Green) ISA card.

2. VT VIRGINIA TECH: Decision Making

3. Computer Decision Making

  • Executes different actions based on computed values or data inputs.

  • In high-level programming languages:

    • Uses constructs like if-then-else statements, loops (for, while, case statements).

  • In RISC-V, decision-making is accomplished through simple branches:

    • beq rs1, rs2, L1: If (rs1 == rs2) PC=PC + (imm * 2)

    • The immediate operand for branches is 12-bits long, encoding a signed number of half-words.

4. Types of Branches

  • Branches Change Control Flow:

    • Conditional branches respond to comparison outcomes:

      • beq: branch if equal

      • bne: branch if not equal

      • blt: branch if less than

      • bge: branch if greater or equal

      • bltu: branch if less than, unsigned

      • bgeu: branch if greater or equal, unsigned

    • Unconditional Branches (Jumps): Always transfer control.

      • j label: translates to jal x0, imm, PC = PC + (imm * 2)

    • The immediate operand for jumps is 20-bits, encoding a signed number of half-words.

5. Examples of Conditional Statements

Example: If Statement

  • Compiled If Block:

    • f → x10

    • i → x13

    • g → x11

    • h → x12

    • j → x14

  • if (i == j) f = g + h;

    • bne x13, x14, Exit

    • add x10, x11, x12

Example: If-Then-Else Statement

  • if (i == j) f = g + h; else f = g - h;

  • Compiled commands:

    • bne x13, x14, Else

    • add x10, x11, x12

    • j Exit

    • Else: sub x10, x11, x12

6. Magnitude Comparison in RISC-V

  • Comparison Instructions for ‘<‘ and ‘>’:

    • blt rs1, rs2, label: If (rs1 < rs2) PC = PC + imm * 2

    • bltu rs1, rs2, label: Same as above, treating rs1 and rs2 as unsigned.

  • Branch instructions for greater than or equal comparisons: bge, bgeu.

  • No explicit greater than or less than equal instructions; these are deemed unnecessary.

7. Loops in C/Assembly

  • C types of loops include:

    • while

    • do…while

    • for

  • Any loop can be rewritten using conditional branches.

  • Key concept: decision-making in loops is achieved using a conditional branch.

8. Practice: C Loop Mapped to RISC-V Assembly

  • Provided a C loop example:

    • int A[20]; int sum= 0; for(int i=0; i<20; i++) sum += A[i];

  • Mapped instructions:

    • Initialize sum and index,

    • Check loop condition, access array elements, update sum, increment counter.

9. VT VIRGINIA TECH: Logical Instructions

10. What We Have Learned So Far (Continued)

  • Summary of Logical Instructions:

    • Add/Sub:

      • add rd, rs1, rs2

      • sub rd, rs1, rs2

    • Add Immediate:

      • addi rd, rs1, imm

    • Load/Store: Instructions for loading and storing data.

    • Branching: Includes conditional and unconditional branches.

11. Logical Instructions Overview

  • Purpose: Operate on fields of bits (e.g., characters within a word).

  • Logical Operations:

    • C operators, Java operators, RISC-V instructions mapped accordingly:

      • AND: & and

      • OR: | or

      • XOR: ^ xor

      • Shift Left Logical: << sll

      • Shift Right Logical: >> srl

12. RISC-V Logical Instructions

  • Types of Instructions:

    • Register-Register:

      • and x5, x6, x7: x5 = x6 & x7

    • Immediate:

      • andi x5, x6, 3: x5 = x6 & 3 (immediate is signed!)

      • Examples of masking operations are discussed.

  • NOT operation is implemented via XOR with a source of all ones.

13. Logical Shifting Instructions

  • Instructions such as Shift Left Logical (sll) and Shift Logical Immediate (slli).

  • Differences in immediate operand encoding compared to other instruction types.

  • Describes results of left shifting, reinforcing the implications on binary data.

14. Arithmetic Shifting Instructions

  • Shift Right Arithmetic (sra, srai): Moves bits to the right, maintaining the sign bit.

  • Example demonstrates how arithmetic shifting is not equivalent to division.

15. What is Stored in x12

  • Example manipulation using slli, srli, and and operations on x10 values.

16. VT VIRGINIA TECH Compiling Programs to Machine Code

17. Helpful RISC-V Assembler Features

  • Utilizes symbolic register names and pseudo-instructions for brevity and ease.

  • Explains usage and variations of pseudo-instructions.

18. Assembly to Machine Code Process

  • Overview of transforming assembly source files into machine code executables.

  • Discusses the role of assembler and linker processes.

19. How is a Program Stored

  • Describes the von Neumann style memory structure involving program and data storage.

20. Program Execution

  • Highlights components involved in program execution:

    • Processor control, data path, registers, memory organization, input/output operations, and instruction fetching.