BCSE205L Study Notes on High Performance Processors

BCSE205L Computer Architecture and Organization

Module 7 – High Performance Processors

Parallel Processing

• Definition: Parallel computers emphasize parallel processing by simultaneously performing operations.

• Memory Types:
    - Distributed Memory:
      - Each CPU has its own memory.
    - Shared Memory:
      - All CPUs share a common memory.
    - Hybrid Memory:
      - Combination of shared and distributed memory.

Classification of Parallel Machine Models - Flynn's Taxonomy

• Origin: Introduced by Michael Flynn in 1972.

• Concept: Categorization based on instruction and data streams.
    - Instruction Stream: Flow of instructions from main memory to CPU.
    - Data Stream: Flow of data between processor and memory.

• Classifications:
    - SISD (Single Instruction Single Data):
      - Traditional sequential computing; uniprocessor executing single instruction on single data stream.
    - SIMD (Single Instruction Multiple Data):
      - One instruction operates on multiple data; popular in vector and scientific computations.
      - Example architectures: ILLIAC-IV, BSP, STARAN.
    - MISD (Multiple Instruction Single Data):
      - Multiple processing elements with diverse instruction streams on one data stream; rare in practice.
      - Example: C.mmp computer.
    - MIMD (Multiple Instruction Multiple Data):
      - Each processor has its own instruction and data streams; most common in parallel architecture.
      - Examples: Cray-2, IBM 370 MP.

Instruction Cycle Process

1. Start

2. Calculate instruction address.

3. Fetch instruction.

4. Decode instruction.

5. Calculate operand address.

6. Fetch operands.

7. Execute instruction.

8. Store results.

9. Repeat for the next instruction.

Detailed Descriptions within Flynn's Taxonomy

SISD Details

• Definition: SISD systems are characterized as traditional sequential systems with one instruction operating on a single data stream.

• Characteristics:
     - Sequential instruction processing.
     - All instructions and data must be stored in primary memory.

SIMD Details

• Architecture: Employs multiple processing units under a single control unit.

• Functionality: Single instruction executed by multiple data units, improving efficiency in data-intensive tasks.

• Advantages: Ideal for scientific computing involving vector operations.

• Processing Example:
    - Sequence of loading data and storing results across multiple processing elements.

MISD Details

• Definition: MISD involves multiple processors, each with its own instruction streams.

• Characteristics: Single data stream processed with different instructions from multiple processors without practical applications found.

• Use Cases: Applicable in fault-tolerant systems where redundant data is compared to ensure error detection.

MIMD Details

• Definition: Multiple instruction streams operate independently on various data streams across processors.

• Characteristics:
     - Allows tasks to be executed in different time frames across processors.
     - Most general-purpose parallel architecture.

• Memory Access Types:
    - Shared Memory: Processors use common memory for data exchange.
    - Distributed Memory: Memory divided among various processors for efficiency.

Pipelining

• Concept: Overlapping stages of instruction processing to enhance CPU throughput.

• Stages of Pipelining:
    - Instruction Fetch (IF)
    - Instruction Decode (ID)
    - Execute (EX)
    - Memory Access (MEM)
    - Write Back (WB)

Performance in Pipelining

• Benefits:
    - Increased throughput by allowing overlapping executions.
    - Reduction in overall execution time for sequences of instructions.

• Simulation Example:
    - Comparing non-pipelined laundry tasks with pipelined processing to illustrate efficiency in execution times.

Speedup and Efficiency

• Speedup Formula:
  $S(n) = rac{T(1)}{T(n)}$

• Efficiency: Measure of resource utilization.

• Amdahl's Law: Highlights the limits on speedup when portions of a task cannot be parallelized.
    - $ext{Speedup} = rac{1}{(1-f) + rac{f}{N}}$ where:
       - f = Fraction of code parallelizable.
       - N = Number of processors.

• Implications: Points towards diminishing returns on adding more processors as non-parallelizable parts limit gains.

Pipelining Challenges

• Data Hazards: Occur when future instructions depend on earlier uncompleted instructions.

• Structural Hazards: Arise when resources required for overlapping instruction executions are insufficient.

• Control Hazards: Issues stemming from branches and jumps in execution.

Resolutions to Hazards

• Data Hazards: Handled through techniques like operand forwarding and instruction scheduling.

• Structural Hazards: Addressed by duplicating resources and instruction reordering.

• Control Hazards: Managed by prefetching instructions, branch target buffers, and branch prediction techniques.

Superscalar Architecture

• Definition: Architecture that allows for multiple instruction pipelines instead of a single one.

• Purpose: To exploit instruction-level parallelism more efficiently and enhance processing speed.

• Execution Benefits: Facilitate the simultaneous advancement of various instructions, allowing for high throughput.

Performance Metrics Assessment

• Metrics: Speedup, efficiency, and granularity evaluated against performance goals.

Amdahl’s Law Applications

• Usage: In evaluating any improvements to systems in computing through parallel processing.

• Practical Examples: Utilizing fractions of improvement to determine overall system speedup.

• Provides reasoning for assessing hardware and software enhancements in systems for efficiency.

Conclusion

• Parallel architectures such as SIMD and MIMD, as well as pipelining, illustrate the evolution of processor technology towards maximizing computational efficiency. Improvements in processor design, pipelining approaches, and the understanding of parallelism through Flynn’s Taxonomy contribute significantly to advancements in computer architecture.