Digital Systems Design I - Introduction & Engineering Design Procedure

Course Administration & Lab Requirements

• Course Overview:

  • Course Codes: EE 2369 / ECE 2303 — Digital Systems Design I.
  • Focuses on logic design, digital concepts, Boolean algebra, logic gates, and structured circuit design procedures.

• Digital Systems Design 1 LAB for Electrical and Computer Engineering (ECE) Majors:

  • Associated Lab Course: ECE 2103.
  • Physical Location: Engineering Building, Room E-319E.
  • Start Date: August 31 (2nd week of classes).
  • Attendance Policy: Attendance at every single lab session is mandatory and must be scheduled on the student's calendar. Due to grading weight, every unexcused lab absence drops the final letter grade by one full grade level.
  • Preparation Workflow:
  1. Complete the "Getting started" activity on BlackBoard (BB).
  2. Review the content for Lab #1 on BB.
  3. Attend the first mandatory lab session to review resources, logistics, requirements, and submission deadlines.

• Digital Systems Design 1 LAB for Computer Science (CS) Majors:

  • Associated Lab Course: EE 2169.
  • Physical "Home Base": Engineering Building, Room E-319.
  • Start Date: 2nd week of classes, conducted virtually via Zoom.
  • Preparation Workflow:
  1. Review the official announcement email/posting.
  2. Complete the "Getting started" activity on BB.
  3. Review Lab #1 content on BB.
  4. Attend the mandatory one-time virtual Zoom session to go over lab resources, logistics, requirements, and deadlines.
  5. Access the Zoom meeting link via the left-side navigation menu on BB under upcoming meetings.

Applications of Digital Design

• Definition: Digital design encompasses the creation, specification, and implementation of digital hardware circuits that process binary information.

• Computers & Networking:

  • Personal computers, laptops, engineering workstations, and supercomputers.
  • Tablets, iPads, network routers, and digital communications devices (e.g., smartphones).

• Processor-Controlled Equipment:

  • Gaming consoles: XBOX, PlayStation, Nintendo Switch.
  • Audio systems: Bluetooth speakers, over-ear headphones, earbuds, open-ear devices, and in-ear monitors.
  • Automotive electronics: Anti-lock Braking Systems (ABS), electronic fuel injection, and emission control units.
  • Computer peripherals: High-resolution monitors, printers, traffic light controllers, and elevator dispatch controllers.

• Robotics & Autonomous Systems:

  • Unmanned Aerial Vehicles (drones) and fully autonomous self-driving vehicles.
  • Embedded microprocessors, such as the Intel Pentium Integrated Circuit (IC), containing millions of interconnected transistors on a single silicon die.

• Automatic Control Systems:

  • Spacecraft guidance systems, missile guidance systems, smart HVAC controllers, and digital thermostats (e.g., NEST).

• Instrumentation & Medical Systems:

  • Aircraft subsystems and avionics.
  • Medical diagnostic devices: Digital thermometers, sphygmomanometers (blood pressure monitors), Magnetic Resonance Imaging (MRI) machines, and Computerized Axial Tomography (CAT) scanners.
  • Electronics test equipment: Automotive diagnostic tools, logic analyzers, digital storage oscilloscopes, and digital multimeters.

Advantages of Digital Systems & Key Technologies

• Core Advantages:

  • Accuracy: Precision is governed by the number of binary digits (bits) utilized. Contrast with analog systems (e.g., analog vinyl records vs. digital audio formats like MP3/MP4, where audio/video fidelity directly correlates with sampling rates and bit depth).
  • Reliability: Built-in noise immunity due to operating on discrete voltage levels separated by defined noise margins. Capable of implementing robust error-detection and error-correction algorithms.
  • Fabrication & Implementation Flexibility: Easily realized using ultra-fast, cost-effective semiconductor fabrication technologies.

• Key Digital Technologies & Acronyms:

  • CMOS (Complementary Metal-Oxide Semiconductor): Primary technology for constructing integrated circuits, featuring high noise immunity and low static power consumption.
  • PCB (Printed Circuit Board): Mechanical substrate providing electrical interconnections between packaged electronic components.
  • FPGA (Field-Programmable Gate Array): Reconfigurable integrated circuit that allows post-fabrication logic customization.
  • TTL (Transistor-Transistor Logic): Logic family built from bipolar junction transistors.
  • ECL (Emitter-Coupled Logic): High-speed nonsaturating logic family.
  • GaAs (Gallium Arsenide): High-frequency semiconductor material used in specialized ultra-fast circuits.
  • IEEE (Institute of Electrical and Electronics Engineers): Standards body governing electrical engineering notation and gate symbol specifications.

Digital Design Concepts & Levels of Abstraction

• Foundational Axiom: "Digital design is the art of converting words into digital circuits."

• Characteristics of Digital Design:

  • Design problems are open-ended, offering multiple valid architectural solutions.
  • Employs both Top-Down (decomposing system specifications into lower modules) and Bottom-Up (building complex systems from atomic gates) design methodologies.
  • Mastery requires deep conceptual understanding rather than rote memorization.

• Hierarchical Levels of Abstraction:

  • High Level — System Design (Senior-Level Curriculum):
  • Systems are architected using modular functional "building blocks".
  • Focuses on system interconnectivity, protocol selection, and data-path routing.
  • Middle Level — Logic Design (Current Course Focus):
  • Circuit behavior inside building blocks is designed using gate-level logic, IC packages, or FPGAs.
  • Low Level — Circuit Design (Senior-Level Curriculum):
  • Design of basic macro circuits and physical transistor-level structures (e.g., VLSI design).

The Engineering Design Procedure & Design Cycles

• Lecture Design Cycle (End-to-End System Lifecycle):

  1. Problem Specification: Formulate precise operational requirements.
  2. Design: Translate specifications into logic expressions and hardware schematics.
  3. Simulate: Model circuit behavior digitally before physical fabrication.
  4. Verify: Check simulation outputs against the initial problem specification; iterate back to design if discrepancies exist.
  5. Build: Construct physical hardware prototypes.
  6. Test: Validate physical prototype operation under real hardware conditions; iterate back to build phase if faults occur.
  7. Physical Product for Delivery: Final hardware deployment.

• Lab Design Cycle Focus:

  • Concentrates heavily on the iterative loop: Design \n\rightarrow\n Simulate \n\rightarrow\n Verify prior to physical board implementation.

• Standard 6-Step Design Procedure:

  1. Understand the problem thoroughly.
  2. Define input and output variables, and construct a high-level block diagram.
  3. Obtain an algorithmic description of the solution (e.g., construct a Truth Table or ASM Chart).
  4. Derive reduced Boolean equations for every output variable as a function of the input variables.
  5. Draw the complete schematic circuit diagram using standard IEEE/traditional logic gate symbols.
  6. Implement, test, and package the physical circuit.

Number Systems and Binary Representation

• Fundamental Properties of Number Systems:

  • Number systems represent quantitative values and support standard arithmetic operations.
  • Every number system is characterized by a base or radix $r$.
  • Rule 1: A number system of radix $r$ contains exactly $r$ distinct counting digits.
  • Rule 2: Digits span the set $\{0, 1, 2, \dots, r - 1\}$.
  • Rule 3: Positional values correspond to integer powers of the radix ($r^n, \dots, r^3, r^2, r^1, r^0$).

• Common Number Systems:

  • Decimal (Radix $r = 10$): Digits $\{0, 1, 2, 3, 4, 5, 6, 7, 8, 9\}$; Positional weights $10^n \dots 10^3, 10^2, 10^1, 10^0$.
  • Binary (Radix $r = 2$): Digits $\{0, 1\}$; Positional weights $2^n \dots 2^3, 2^2, 2^1, 2^0$.
  • Octal (Radix $r = 8$): Digits $\{0, 1, 2, 3, 4, 5, 6, 7\}$; Positional weights $8^n \dots 8^3, 8^2, 8^1, 8^0$.
  • Hexadecimal (Radix $r = 16$): Digits $\{0, 1, 2, 3, 4, 5, 6, 7, 8, 9, \text{A}, \text{B}, \text{C}, \text{D}, \text{E}, \text{F}\}$; Positional weights $16^n \dots 16^3, 16^2, 16^1, 16^0$.

• Binary to Decimal Conversion Example:

  • Convert $1101_2$ to base 10:
  • $1101_2 = (1 \times 2^3) + (1 \times 2^2) + (0 \times 2^1) + (1 \times 2^0)$
  • $1101_2 = (1 \times 8) + (1 \times 4) + (0 \times 2) + (1 \times 1)$
  • $1101_2 = 8 + 4 + 0 + 1 = 13_{10}$

• Arithmetic Complements:

  • Used for representing negative numbers and simplifying subtraction in digital hardware (e.g., 1's complement and 2's complement system in binary).

Binary Codes

• Definition & Function:

  • Codes represent abstract non-numeric binary patterns within specific contexts.
  • Arithmetic operations on raw code patterns are generally meaningless.
  • Establishes a strict strict 1-to-1 association mapping within a specified context.

• Standard Code Categories:

  • BCD (Binary Coded Decimal): Encodes decimal digits $0\text{--}9$ directly into 4-bit binary strings.
  • 2-out-of-5 Code: Constant-weight code used for hardware error checking.
  • Excess-3 Code: Unweighted self-complementing code helpful in decimal arithmetic arithmetic sequencing.
  • Gray Code: Minimal-distance code where adjacent values differ by only one bit; ideal for shaft encoders and digital state sequencing.
  • ASCII (American Standard Code for Information Interchange): 7-bit character encoding standard representing alphanumeric text and control commands.

• ASCII Table Selection:

  • Binary matrix format indexed by column header $B_4 B_3 B_2 B_1$ and row header $B_7 B_6 B_5$:
  • $B_4 B_3 B_2 B_1 = 0000_2, B_7 B_6 B_5 = 011_2 \rightarrow$ Character '0'
  • $B_4 B_3 B_2 B_1 = 0001_2, B_7 B_6 B_5 = 011_2 \rightarrow$ Character '1'
  • $B_4 B_3 B_2 B_1 = 0001_2, B_7 B_6 B_5 = 100_2 \rightarrow$ Character 'A'
  • $B_4 B_3 B_2 B_1 = 0001_2, B_7 B_6 B_5 = 101_2 \rightarrow$ Character 'Q'

Fundamentals of Binary Logic

• AND Operation (Logical Conjunction):
  • Conditional Example: IF (it is raining) AND (I need to go outside) THEN (I will need an umbrella to keep dry).
  • Algebraic Equation: $C = A \cdot B$ or $C = AB$
  • AND Truth Table:

• OR Operation (Logical Disjunction):
  • Conditional Example: IF (the paper jams) OR (the error light is on) THEN (take the printer off-line).
  • Algebraic Equation: $C = A + B$
  • OR Truth Table:

• NOT Operation (Logical Inversion / Complement):
  • Conditional Example: IF (Jack does) NOT (go) THEN (Jill will go).
  • Algebraic Equation: $B = \overline{A}$
  • NOT Truth Table:

Logic Gate Characteristics & Circuit Parameters

• Physical Operating Parameters:
  • Voltage Levels & Thresholds: Operating bands for defined high logic "1" ($V_{\text{OH}}, V_{\text{IH}}$) and low logic "0" ($V_{\text{OL}}, V_{\text{IL}}$).
  • Fan-Out & Load Calculation: Maximum number of standard gate inputs that a single gate output can drive reliably without violating voltage specifications.
  • Noise Margins: Voltage headroom provided to prevent ambient electrical noise from triggering invalid state transitions.
  • Switching Times & Propagation Delays: Finite time required for output signals to respond to changes at the input.
  • Gate Symbols: Standard schematic representation matching IEEE STD symbol standards versus traditional curved logic gate symbols.

Standard Boolean Forms

• Canonical Sum-of-Products (SOP):

  • Expressed as a logical OR sum of minterms, where every variable appears in either uncomplemented or complemented form in each product term.
  • Example: $F = A B C + \overline{A} B C + A B \overline{C}$

• Canonical Product-of-Sums (POS):

  • Expressed as a logical AND product of maxterms, where every variable appears in either uncomplemented or complemented form in each sum term.
  • Example: $F = (A + B + C)(\overline{A} + B + C)(A + B + \overline{C})$

• Reduced Equations or Expressions:

  • Simplified Boolean expressions minimized using Boolean algebra theorems or Karnaugh Maps (K-maps) to reduce physical gate count.
  • Example: $F = AB + C$

Step-by-Step Design Procedure Example: Workstation Counter

• Problem Statement:

  • Design a digital circuit for a space-restricted laboratory room containing 3 workstations. The circuit must continuously report the exact number of active workstations in use at any point in time.

• Step 1: Understand the Problem:

  • Maximum possible workstation count = $3_{10}$.
  • Assign 1 binary input variable per workstation ($S_2, S_1, S_0$).
  • Maximum count output value is $3_{10} = 11_2$, which requires 2 binary output variables ($N_1, N_0$).

• Step 2: Define Input and Output Variables:

  • Inputs: $S_2, S_1, S_0$ (where $1 = \text{active}$, $0 = \text{inactive}$).
  • Outputs: $N_1, N_0$ (representing binary count of active stations).

• Step 3: Solution Description (Truth Table Construction):

• Step 4: Obtain Reduced Equations:

  • Minimizing logic for $N_1$ (odd parity function for bit 1):
  • $N_1 = S_2 \oplus S_1 \oplus S_0$
  • Minimizing logic for $N_0$ (majority and combination output for bit 0):
  • $N_0 = S_2 (S_1 \oplus S_0) + S_1 S_0$

• Step 5: Draw the Circuit Diagram:

• Inputs $S_0$ and $S_1$ feed an initial XOR gate to output $(S_1 \oplus S_0)$.
• The output $(S_1 \oplus S_0)$ and input $S_2$ feed a second XOR gate to produce N_1 = S_2 \oplus S_1 \oplus S_0$.\n * (S_1 \oplus S_0)$and$S_2$enter an AND gate to yield$S_2(S_1 \oplus S_0).\n * Inputs S_1$and$S_0$enter a second AND gate to yield$S_1 S_0$.
• The outputs of both AND gates feed a 2-input OR gate to produce N_0 = S_2(S_1 \oplus S_0) + S_1 S_0$.\n\n* **Step 6: Physical Hardware Implementation:**\n\n\n\n * **Integrated Circuits (74xx Series DIP Chips Used):**\n * **7486:** Quad 2-input XOR Gate IC.\n * **7408:** Quad 2-input AND Gate IC.\n * **7432:** Quad 2-input OR Gate IC.\n * **Power Connections:**\n * Pin 14 of all IC packages connected to +5\,\text{V} (VCC).\n * Pin 7 of all IC packages connected to Ground (GND).\n\n\n\n * **Interface & Deployment:**\n * Connect switches for inputs S_0, S_1, S_2\n * Connect logic output terminals N_1, N_0$$ into output indicator drivers or a 7-segment display module (ADDR7SEG) to display the numerical count visually.