1728110906_Unit 1_OS and Computer architecture-Spring 24 (3)
Overview of Operating Systems and Computer Architecture
Key Concepts
Computer Registers: High-speed storage locations within the CPU; vital for processing and execution of instructions.
Classification of Instructions: Instructions categorized by address sizes—zero, one, two, and three-address instructions.
Addressing Modes: Techniques used to calculate effective memory addresses for data operations.
Arithmetic and Logic Circuit Design: Fundamental digital circuits performed by the CPU.
Instruction Execution Cycle: The process through which a computer processes instructions, including fetching, decoding, and executing.
Introduction to GPU: Understanding the role of Graphics Processing Units in computer architecture.
CPU (Central Processing Unit) Components
Definition and Function
Central Processing Unit (CPU): The primary component responsible for executing instructions and processing data.
Major Parts of CPU:
Control Unit: Directs operation of the processor and manages data flow.
Arithmetic Logic Unit (ALU): Performs arithmetic and logical operations.
Register Set: Temporary storage for data and instructions being processed.
Control Unit Types
Hardwired Control Unit
Utilizes fixed logic gates and circuits for instruction execution.
Characteristics:
Simple and fast.
Inflexible and difficult to modify.
Micro-programmed Control Unit
Uses microcode to execute instructions, allowing for flexibility in changes.
Characteristics:
Microprogram consists of sets of micro-instructions that guide control signals.
Addresses stored in control memory (ROM).
Microprogrammed Control Unit Operations
Tasks Performed
Microinstruction Sequencing: Retrieves next microinstruction from control memory.
Microinstruction Execution: Generates control signals needed for executing instructions.
Computer Registers
Importance and Function
Registers are critical for minimizing time-consuming access to main memory, enhancing the efficiency of computations.
Types of Registers
Register Name Symbol Bits Function | |||
Data Register | DR/MBR | 16 | Holds data to be processed |
Address Register | AR/MAR | 12 | Stores memory address |
Accumulator | AC/ACC | 16 | Temporary results holder |
Instruction Register | IR | 16 | Holds the current instruction |
Program Counter | PC | 12 | Holds address of next instruction |
Temporary Register | TR | 16 | Stores temporary data |
Input Register | INPR | 8 | Holds input characters |
Output Register | OUTR | 8 | Holds output characters |
Arithmetic Logic Unit (ALU)
Role and Operations
Performs arithmetic and logical operations using binary number processing.
Functions Performed
Logical Operations: Includes AND, OR, NOT, XOR, etc.
Bit-Shifting Operations: Moves bits left or right.
Arithmetic Operations: Primary operations such as addition, subtraction, multiplication, and division.
Instruction Cycle
Phases of Execution
Fetch: Collects instruction from memory.
Decode: Determines what action to perform on the instruction.
Read Effective Address: Accesses memory for operands.
Execute: ALU processes the instructions.
Store: Writes results back to memory.
Prefetching Techniques
CPU Prefetching: Improves performance by fetching data or instructions from memory into the CPU's cache before they are needed.
Types:
Instruction Prefetching: Predictive fetching of upcoming instructions.
Data Prefetching: Anticipatory loading of data into cache memory.
Classification of Instructions
By Size
Three-Address Instructions: Commands include three addresses specifying memory locations.
Example of evaluating expressions.
Two-Address Instructions: Involves two addresses with the result stored in one of them.
One-Address Instructions: Uses one address; operations are performed using an accumulator.
Zero-Address Instructions: Operands are implicit and typically involve stack operations.
By Mode
Instructions can be further classified based on addressing modes like implied, immediate, direct, indirect, relative, and indexed.
Addressing Modes Explained
Implied: No explicit operands; typically a zero-address instruction.
Immediate: Data is present in the instruction itself.
Register: Operands are located in registers specified by the instruction.
Direct: Address part directly specifies location in memory.
Indirect: Instruction contains the address of the effective address of the operand.
Relative: Based on the current value of the program counter.
Indexed: Combines index register and address field to obtain effective address.
Graphics Processing Units (GPU)
Characteristics
Specialized for handling complex calculations for rendering graphics and parallel processing tasks.
Key Differences:
CPUs perform a wide range of tasks; GPUs focus on graphical computations and parallel tasks.
Advantages: Faster graphics rendering, improved performance for compute-intensive tasks.
References
Mano, Moris M. (3rd Edition) Computer Architecture, Prentice Hall.
Hwang, Kai & Briggs, Faye A. (1984) Computer Architecture and Parallel Processing, Tata McGraw Hill.
Stallings, William (2012), Computer Organization and Architecture: Designing for Performance, 9th Edition, Prentice Hall.