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5.2 NEED FOR AN INTERFACE
Input-Output Interface:
Facilitates the transfer of information between internal storage devices (e.g., memory) and external peripheral devices.
Peripheral devices can be categorized as:
Input Devices: Examples include keyboard and mouse, which supply data to the computer.
Output Devices: Examples include monitors and printers, which output data from the computer.
I/O Devices: Some devices can provide both input and output (e.g., external hard drives).
Micro-computer Base System:
Peripheral devices serve to create communication links with the CPU.
Differences between peripheral devices and CPU necessitate special communication links.
Nature:
Peripheral Devices: Electromagnetic and electro-mechanical.
CPU: Electronic.
Speed: Peripheral devices have slower synchronization mechanisms compared to the CPU.
Data Formats: Peripheral devices and memory use different data formats.
Operating Modes: Peripheral devices have distinct operation modes to ensure they do not disturb other devices.
5.5 FUNCTIONS OF INPUT-OUTPUT INTERFACE
Synchronization: Ensures the operating speed of the CPU matches with input-output devices.
Device Selection: Chooses appropriate input-output devices for data interpretation.
Signal Provisioning: Provides control and timing signals.
Data Buffering: Facilitates buffering through the data bus.
Error Detection: Includes multiple error detectors.
Data Conversion:
Converts serial data to parallel and vice-versa.
Converts digital data to analog and vice-versa.
5.3 THREE MODES OF DATA TRANSFER
Data Transfer Types: Transfers can occur between:
CPU and Memory
CPU and I/O Devices
Memory and I/O Devices
Transfer Methodologies:
Programmed Data Transfer: CPU monitors and controls the transfer process.
Direct Memory Access (DMA): Allows peripherals to communicate directly with memory bypassing CPU involvement.
5.6 COMPUTER ARCHITECTURE
Data Transfer Modes
Synchronous Transfer: Uses common clock pulses for data transfer (e.g., chat rooms, video conferencing).
Asynchronous Transfer: Does not require synchronized timing; operates with start and stop bits (e.g., telephonic conversations).
Strobe Controlled Procedure
Mechanism: Uses a single control line to time transfers, allowing source or destination units to initiate data transfer.
5.7 HANDSHAKING PROCEDURE OF DATA TRANSFER
Definition: Handshaking synchronizes data transfer by sending signals between source and destination units to confirm data readiness.
Signal Exchange: For every direction of data flow, a corresponding control signal ensures data integrity during transfer.
5.9 DMA CONTROLLED TRANSFER
Direct Memory Access (DMA):
Allows peripherals to communicate directly with memory units without CPU intervention, improving efficiency.
Types of DMA Transfer:
Burst Transfer: Transfers an entire block of data before relinquishing the bus control.
Cycle Stealing: Transfers one word at a time, allowing CPU to resume its operations in intervals.
Interleaved Mode: Using the bus during CPU idle periods for efficient data transfers.
5.10 PRIORITY INTERRUPT, POLLING, AND DAISY CHAINING
Priority Interrupts: Determine which device with simultaneous requests gets serviced first, giving priority to faster devices like magnetic disks.
Types of Interrupts:
Hardware Interrupts: Triggered by external devices.
Software Interrupts: Caused by internal software actions.
Daisy Chaining: A series connection of devices; higher priority devices are serviced first.
5.11 INPUT OUTPUT PROCESSOR
Input-Output Processor (IOP):
Manages input-output tasks independently of the CPU, allowing direct data transfer between peripherals and memory.
The CPU assigns I/O tasks, while the IOP handles execution.
5.12 BUS SYSTEMS
Types of System Buses
Control Bus: Information on data transfer methods.
Data Bus: Carries actual data.
Address Bus: Indicates addresses of accessed data.
Functionality of Buses
Data buses facilitate communication between various computer components, ensuring coordinated transfers.