Transistors – Comprehensive Study Notes

Introduction to Transistors

  • A transistor is an electronic, semiconductor‐based switch that can also function as an amplifier.

  • Two principal applications:

    • Switch: turns a circuit or device ON/OFF.

    • Amplifier: boosts small input signals (e.g.

    • Audio amplifier with BC547 transistor; cited 700 k views example).

  • Modern part numbers shown in slides (e.g. BC542, 2N2219A, C2078), illustrating real components.

Bipolar Junction Transistor (BJT): Structure

  • Formed by combining two p–n junction diodes back-to-back:

    • p–type sandwiched between two n–type layers → NPN.

    • n–type sandwiched between two p–type layers → PNP.

  • Hence called “bipolar” because both majority and minority charge carriers (electrons & holes) participate in conduction.

  • Each device has three physical regions and corresponding terminals:

    1. Emitter (E) – heaviest doping; supplies majority carriers.

    2. Base (B) – very thin (≈25μm25\,\mu\text{m}), lightly doped; controls current.

    3. Collector (C) – largest cross-section, moderately/lightly doped; collects carriers.

  • External pins: e (emitter), b (base), c (collector).

Types of BJTs

NPN Transistor
  • Layer order: N!!P!!NN!–!P!–!N.

  • Under normal operation (forward-biased emitter–base, reverse-biased base–collector):

    1. Emitter current (IE) flows out of the emitter.

    2. Base current (IB) flows into the base.

    3. Collector current (IC) flows into the collector.

  • Fundamental current relation: I<em>E=I</em>B+ICI<em>E = I</em>B + I_C.

PNP Transistor
  • Layer order: P!!N!!PP!–!N!–!P.

  • Current directions are opposite:

    1. IE flows into the emitter.

    2. IB flows out of the base.

    3. IC flows out of the collector.

  • Same magnitude law: I<em>E=I</em>B+ICI<em>E = I</em>B + I_C.

Carrier Flow & Detailed NPN Operation (Microscopic View)

  • Two initial depletion layers exist at the n<em>1!Pn<em>1!–P and P!n</em>2P!–n</em>2 junctions.

  • Forward bias (battery B<em>1B<em>1) on the emitter–base junction reduces its depletion width, letting electrons from n</em>1n</em>1 diffuse into the base.

  • Base is very thin & lightly doped ⇒ insufficient holes to recombine.

    • 2 % of electrons recombine → forms the base current (IB).

    • Remaining ≈ 98 % swept into collector region (reverse-biased by battery B2B_2) → collector current (IC).

  • External supply B<em>1B<em>1 replenishes electrons to emitter; B</em>2B</em>2 completes path back to emitter.

  • Same qualitative picture applies to PNP, but with hole motion instead of electrons and opposite battery polarities.

Current Percentages & Equation

  • Experimental observation for typical small-signal BJTs:
    IC0.98I<em>E,I</em>B0.02IE.\text{IC} \approx 0.98\,I<em>E, \qquad I</em>B \approx 0.02\,I_E.

  • Governing relation (repeated): I<em>E=I</em>C+IB.I<em>E = I</em>C + I_B.

Standard Transistor Configurations

  1. Common Base (CB) – seldom used in basic courses; special-purpose (high-freq).

  2. Common Emitter (CE) – most widely used (amplifiers, switching).

  3. Common Collector (CC) or emitter follower – high input impedance buffers.

Slides emphasise CE configuration; CB & CC mentioned but not discussed in depth.

Common-Emitter Static Output Characteristics

  • Measured by holding base current I<em>BI<em>B constant and plotting I</em>CI</em>C vs VCEV_{CE}.

    • Variable R1 sets I<em>BI<em>B; variable R2 adjusts V</em>CEV</em>{CE}.

  • Repeated for multiple values → family of curves.

  • Provides safe-operation data (datasheet maximum ratings, avalanche avoidance).

Regions on the CE Curve
  1. Cutoff Region

    • IB=0I_B = 0 ⇒ transistor OFF (open switch).

    • I<em>C0I<em>C \approx 0 regardless of V</em>CEV</em>{CE}.

  2. Active Region

    • Device acts as a current amplifier.

    • Small ∆I<em>BI<em>B causes large ∆I</em>CI</em>C.

    • Current gain (beta):
      β=ΔI<em>CΔI</em>B<em>V</em>CE=const.\beta = \frac{\Delta I<em>C}{\Delta I</em>B}\Big|<em>{V</em>{CE}=\text{const}}.

  3. Saturation Region

    • Transistor fully ON (closed switch); I<em>CI<em>C at max, further V</em>CEV</em>{CE} increase has little effect.

  • Design Note: Amplifiers should operate in the active region; switches use cutoff ↔ saturation.

Qualitative Observations
  • For a given I<em>BI<em>B curve: increasing V</em>CEV</em>{CE} in cutoff does nothing; in active region ICI_C rises roughly flat (constant) until saturation.

  • Higher I<em>BI<em>B → steeper, higher-lying I</em>CI</em>C curve (more collector current at same voltage).

Amplification Mechanism in CE Circuit

  • Apply small DC bias voltage V<em>BV<em>B to base → sets I</em>BI</em>B.

  • Because base–emitter junction is forward biased, required is small; circuit resistance low.

  • Resulting I<em>CI<em>C flows through load resistor R</em>LR</em>L, producing output voltage VCEV_{CE}.

  • Supply voltage kept constant at V<em>CCV<em>{CC}, so: V</em>CC=V<em>CE+I</em>CRL.V</em>{CC} = V<em>{CE} + I</em>C R_L.

    • Rearranged: V<em>CE=V</em>CCI<em>CR</em>L.V<em>{CE} = V</em>{CC} - I<em>C R</em>L.

  • Therefore a change in I<em>CI<em>C (driven by small change in I</em>BI</em>B) causes opposite change in VCEV_{CE}voltage gain.

DC Load Line Concept

  • Straight line on the I<em>CI<em>CV</em>CEV</em>{CE} graph representing ohmic constraint imposed by R<em>CR<em>C (≡ R</em>LR</em>L).
    Equation from KVL:
    I<em>C=V</em>CCV<em>CER</em>C.I<em>C = \frac{V</em>{CC} - V<em>{CE}}{R</em>C}.

Constructing the Load Line
  1. Point 1 (Y-axis intercept): set V<em>CE=0V<em>{CE}=0I</em>C=V<em>CC/R</em>CI</em>C = V<em>{CC}/R</em>C.

  2. Point 2 (X-axis intercept): set I<em>C=0I<em>C=0V</em>CE=VCCV</em>{CE}=V_{CC}.

  • Draw straight line through these two points.

  • Gradient depends on R<em>CR<em>C; changing R</em>CR</em>C tilts the line.

  • Changing VCCV_{CC} shifts the line parallel along axes.

Quiescent (Q) Point
  • Intersection of load line with chosen IBI_B characteristic.

  • Represents steady-state (no AC input) values of I<em>CI<em>C and V</em>CEV</em>{CE}.

  • Analogy: faucet (tap) where load line = all possible flows, Q-point = normal handle position waiting for signal.

Biasing for Amplification (Simple Bias Circuit)

  • Purpose: establish desired Q-point in active region.

    • RB supplies required base bias current (~IB).

    • VCC supply & RL (a.k.a. RC) set collector side.

  • When small AC signal superimposed on base, Q-point allows symmetrical swing without hitting cutoff or saturation.

CE Amplifier Advantages (per slide)
  • High voltage & power gain.

  • High current gain.

Operating Waveforms (CE Example)

  • Family of curves given (IB = 00, 2525, 5050, 75μA75\,\mu\text{A}) showing:

    • Input AC causes variation in IB → vertical move among curves.

    • Corresponding variation in IC and opposite swing in VCE across RL, producing amplified output waveform.

Practical & Ethical / Application Notes

  • Safe-operating area must be respected to avoid avalanche breakdown and degradation mechanisms.

  • BJTs are ubiquitous in switching regulators, signal amplification, and digital logic interfaces.

  • Understanding load-line & bias ensures reliability, efficiency, and minimizes electronic waste (sustainability angle).

Connections to Other Principles & Courses

  • Relies on p–n junction physics (forward/reverse bias) covered in earlier semiconductor lectures.

  • Kirchhoff’s Voltage Law, Ohm’s Law & graphical methods connect analog electronics to basic circuit theory.

Numerical & Formula Recap

  • Current law: I<em>E=I</em>B+ICI<em>E = I</em>B + I_C.

  • Typical current distribution: I<em>C0.98I</em>EI<em>C \approx 0.98 I</em>E; I<em>B0.02I</em>EI<em>B \approx 0.02 I</em>E.

  • Current gain (beta): β=ΔI<em>C/ΔI</em>B\beta = \Delta I<em>C/\Delta I</em>B (active region).

  • Supply relation: V<em>CC=V</em>CE+I<em>CR</em>LV<em>{CC} = V</em>{CE} + I<em>C R</em>L.

  • Load-line equation: I<em>C=(V</em>CCV<em>CE)/R</em>CI<em>C = (V</em>{CC} - V<em>{CE})/R</em>C.

Summary Checklist (Take-Away)

  • Transistor = switch + amplifier.

  • BJT built from two p–n junctions → NPN / PNP.

  • Three terminals & regions: E, B, C; heavily/lightly doped distinctions.

  • CE configuration dominates practical design; exhibits cutoff, active, saturation.

  • Amplification: small IB → large IC → voltage change across RL.

  • Load line & Q-point graphical tools are essential for bias design.

  • Reliable operation sticks to active region for linear amplification, or full cutoff/saturation for switching.

  • Mastering these fundamentals underpins more complex topics (multi-stage amps, differential pairs, digital TTL, etc.).