CS106 and CS107 Revision Notes

Revision Questions for Computer Systems and Organisation

Question 1

• (a) Signed Two’s Complement 9-bit Integer Range:

  • Least Value: -256
  • Greatest Value: 255

• (b) Hex Byte FD Representation:

  • (i) As Unsigned Integer: 253
  • (ii) As Signed Two’s Complement Integer: -3

• (c) Sorted Signed Two’s Complement 32-bit Hexadecimal Values:

  1. 0FFE60FF
  2. 7FFE50FF
  3. 8FFE70FF
  4. 1FFE90FF
  5. EFFE80FF

• (d) Two’s Complement of EEEE7FF0:

  • Given value N = EEEE7FF0, then -N is:
  • Two’s complement = 1111 0001 0010 1000 1000 0000 0000 0000 = 211018166

• (e) Addition of 8-bit Binary Values:

  • Values: 00100011 + 01011111
  • Result: 01100010
  • Overflow Occurred?: No, because both numbers were positive and the result is within range of an 8-bit signed integer.

Question 2

• C Code Implementation in MIPS Assembly:
  • Assuming m is in register $s7:
    asm loop: # loop body bgtz $s7, loop

Question 3

• MIPS Code for Multiplication Using Shifts and Adds:
  • Given n is in register $a0:
    asm li $t0, 512 li $t1, 256 li $t2, 8 li $t3, 1 sll $t4, $a0, 9 # n * 512 sll $t5, $a0, 8 # n * 256 sll $t6, $a0, 3 # n * 8 add $v0, $t4, $t5 add $v0, $v0, $t6 add $v0, $v0, $a0

Question 4

• C Code to MIPS Assembly for Array Access:
  • Assuming A is in $a0</code> and i in <code>$a1:
    asm sll $t0, $a1, 1 # i * 2 (size of halfword) add $t0, $a0, $t0 # Address of A[i] lhu $v0, 0($t0)

Question 5

• Extract Bits 7-10 and Store in Bits 14-17 of $s1:
  • MIPS Instructions:
    asm andi $t0, $s0, 0x000000F0 # Extract bits 7-10 slli $t0, $t0, 14 # Shift left to bits 14-17 andi $s1, $t0, 0x0000FFFF # Set remaining bits of $s1 to zero

Question 6

• Basic Blocks and Their Line Numbers:
  • Block 1 (Lines 1, 2): Entering loop and loading value
  • Block 2 (Lines 3-6): Condition checks and possibly modifies $s1
  • Block 3 (Lines 7): Updates memory at ($t1) if condition met
  • Block 4 (Lines 8-10): Executing loop mechanics and loop jump
  • Block 5 (Lines 11): Exit from loop

Question 7

• Execution of MIPS Instructions for Array Initialization in Little-endian:
• (a) Contents of $s0 after line 5: 0x8001
• (b) Contents of $s1 after line 6: 0x80
• (c) Contents of $s2 after line 7: 0x80
• (d) Line 8 Execution:
  • When lh $s3, S+1 executes, it attempts to load a halfword from the second byte, thus resulting in 0x8081 due to little-endian storage.