Detailed Notes on Digital Design: Comparators, Decoders, and Encoders

1-Bit Comparator

  • Outputs: 3 Types of Output:
    • A < B
    • A = B
    • A > B
  • Truth Table for 1-bit:
    • A < B is represented as A'B
    • A = B is represented as A'B' + AB = A ⊕ B
    • A > B is represented as AB'

2-Bit Comparator

  • Inputs: Two 2-bit numbers (A1 A0 and B1 B0)
  • Outputs: 3 Outputs similar to 1-bit comparator
  • Truth Table: All possible combinations of A and B states result in outputs A < B, A = B, and A > B.
  • Evaluation: Similar logical operations used as in the 1-bit case but applied to two bits each.

4-Bit Comparator

  • Inputs: Two 4-bit numbers (A3 A2 A1 A0 and B3 B2 B1 B0)
  • General Rules:
    • A > B if:
    • A3 = 1 and B3 = 0
    • A3 = B3 and A2 = 1 and B2 = 0
    • A3 = B3, A2 = B2 and A1 = 1 and B1 = 0
    • A3 = B3, A2 = B2, A1 = B1 and A0 = 1 and B0 = 0

Boolean Expressions for Comparators

  • A > B: A1B1' + A0B1'B0' + A1A0B0'
  • A = B: A1'A0'B1'B0' + A1'A0B1B0 + A1A0B1B0 + A1A0'B1B0'
  • A < B: A1'B1 + A0'B1B0 + A1'A0'B0

Decoders

  • Functionality: For a given input combination, 1 output activates.
  • Logic: n inputs yield 2^n outputs (e.g. 1 to 2, 2 to 4, 3 to 8, etc.)
  • Components: Examples include 74xx146 (3-8 decoder), 74xx4514 (4-16 decoder)

Active High vs. Active Low Logic

  • Active High: Logic levels defined as ON = 1
  • Active Low: Logic levels defined as ON = 0
    • Example: The chip being discussed is active low.

Encoders

  • Overview: Function as the reverse of decoders, where 2^n inputs yield n outputs.
  • Common Models: 74xx148 (8-3 encoder), 74xx147 (10-4 encoder)

Applications of Comparators, Decoders, and Encoders

  • Comparators: Used in sensors (such as temperature or position), motor control systems, and password verification.
  • Decoders: Memory addressing, and controlling functionalities in devices (like switching between a TV and projector screen).
  • Encoders: Useful in keypads where encoded output is easier to transmit.

Additional Notes

  • The following chapters to be explored in upcoming lectures include multiplexers, demultiplexers, and parity generators/checkers.