Electronics (CBS108) Lecture 5: Comprehensive Notes on Semiconductor Current and Diodes
Mechanisms of Current Flow in Semiconductors: Drift Current\n\nIn a semiconductor crystal, such as silicon, the movement of charge carriers is primarily driven by two distinct mechanisms: drift and diffusion. Drift current occurs when an external electrical field, denoted as E, is established within the semiconductor. This field causes holes (positive charge carriers) to accelerate in the same direction as the electric field, while free electrons (negative charge carriers) are accelerated in the opposite direction. This physical behavior is the foundation of electrical conduction under a potential difference. The holes acquire a specific drift velocity, represented as vp−drift, which is mathematically expressed as vp−drift=μpE. In this equation, μp is a constant referred to as the hole mobility. Simultaneously, the free electrons acquire their own drift velocity, vn−drift, expressed as vn−drift=−μnE. The negative sign in the electron velocity formula reflects the physical reality that electrons move in the direction opposite to the established electric field. Here, μn represents the electron mobility constant.\n\nTo determine the resulting current, we focus on the current density, denoted as J, which represents the current per unit of cross-sectional area (A). For a single-crystal silicon bar with a hole concentration of p and a free electron concentration of n, the hole current density (Jp) and electron current density (Jn) are calculated. Although electrons drift in the opposite direction of the electric field, their movement from right to left (if the field is left to right) constitutes a current component from left to right. This follows the standard convention that the direction of current flow is defined by the movement of positive charges and is opposite to the movement of negative charges. The electron current density is expressed as Jn=qnμnE. The total drift current density (J) is the sum of the individual hole and electron current densities: \n\nJ=Jp+Jn=q(pμp+nμn)E\n\nThis relationship identifies the fundamental property of conductivity (σ) of the material, where J=σE. The conductivity is defined as σ=q(pμp+nμn). Conversely, the resistivity (ρ) of the semiconductor is the reciprocal of the conductivity, expressed as:\n\nρ=σ1=q(pμp+nμn)1\n\n# Mechanisms of Current Flow in Semiconductors: Diffusion Current\n\nDiffusion current is the second primary mechanism of charge transport in semiconductors. Unlike drift, which requires an electric field, carrier diffusion occurs when the density of charge carriers within a semiconductor is non-uniform. If the concentration of a carrier—for example, holes—is higher in one region of a silicon crystal than in another, those carriers will naturally move from the region of high concentration to the region of low concentration. This process is analogous to dropping ink into a tank filled with water, where the ink particles move outward until a uniform concentration is achieved. The diffusion of these charge carriers results in a net flow of charge, creating a diffusion current. For electrons, the diffusion process is characterized by the diffusion constant or diffusivity, denoted as Dn, and the resulting current is proportional to the concentration gradient of the carriers.\n\n# The Einstein Relationship and Thermal Voltage\n\nA critical link exists between the two mechanisms of carrier transport through a principle known as the Einstein relationship. This relationship ties the diffusion constant (D) of a carrier to its mobility (μ) through the thermal voltage (VT):\n\nμD=VT\n\nWhere the thermal voltage is defined by the following formula:\n\nVT=qkT\n\nIn this context, k is the Boltzmann constant, T is the absolute temperature in Kelvin, and q is the magnitude of the electronic charge. At standard room temperature (approximately 300K), the thermal voltage VT is approximately 25.9mV. This value is a recurring parameter in semiconductor physics and diode modeling.\n\n# The PN Junction Under Zero External Bias\n\nA pn junction is formed by bringing a p-type semiconductor material into close contact with an n-type semiconductor material, typically both made of silicon. Because the concentration of holes is significantly higher in the p region than in the n region, holes diffuse across the junction from the p side to the n side. Conversely, the high concentration of electrons in the n region causes them to diffuse across the junction to the p side. These two components combine to form the diffusion current (ID), which flows from the p side to the n side.\n\nAs carriers diffuse and move across the junction, they encounter the opposite carrier type and recombine. This recombination process occurs in a region around the junction known as the Depletion Region. In this area, free charge carriers are removed, leaving behind fixed (immobile) ions. These fixed ions create an internal electric field that opposes further carrier diffusion, effectively forming a potential barrier across the junction. This barrier is characterized by the Junction Built-in Voltage (V0). When no external voltage is applied, the built-in voltage is given by the formula:\n\nV0=VTln(ni2NAND)\n\nWhere NA and ND represent the doping concentrations of the p side and n side, respectively. For silicon at room temperature, V0 typically falls within the range of 0.6V to 0.9V. Because the junction must maintain charge neutrality, the total charge on the n side (∣Q+∣=qAxnND) must equal the total charge on the p side (∣Q−∣=qAxpNA). This leads to the relationship for the penetration of the depletion region into each side:\n\nxpxn=NDNA\n\nIn practical applications, one side of the junction is often much more heavily doped than the other (NA≫ND or vice-versa), which causes the depletion region to exist almost entirely within the more lightly doped side.\n\n# Physical Geometry and Stored Charge of the Depletion Region\n\nThe total width of the depletion layer, denoted as W, is the sum of the penetration depths into the n and p regions (W=xn+xp). The formula for the depletion width is:\n\nW=q2ϵs(NA1+ND1)V0\n\nIn this equation, ϵs is the electrical permittivity of silicon, calculated as 11.7×ϵ0. Given ϵ0=8.85×10−14F/cm, the permittivity of silicon is ϵs=1.04×10−12F/cm. Typically, the width W ranges from 0.1μm to 1.0μm. Individual widths for the n and p sides can be calculated using the following relations:\n\nxn=WNA+NDNA\n\nxp=WNA+NDND\n\nThe charge stored on either side of the depletion region (QJ) can also be expressed in terms of the geometry and doping levels:\n\nQJ=Aq(NA+NDNAND)W=A2ϵsq(NA+NDNAND)V0\n\n# The PN Junction with Applied External Voltage\n\nWhen a DC voltage is applied to the terminals of a pn junction, its conduction properties change based on the polarity of the voltage. If the voltage is applied such that the p side is more positive than the n side, the junction is in Forward-Bias. This reduces the potential barrier and allows significant current to flow. Conversely, if the n side is made more positive than the p side, the junction is in Reverse-Bias. This increases the potential barrier, effectively stopping current flow through the device (except for a very small leakage current).\n\n# Diode Physical Structure and Characteristics\n\nA diode is a fundamental electronic component made from a small piece of semiconductor silicon, where half is p-doped (the Anode) and half is n-doped (the Cathode). The junction between them creates the depletion region. The electrical behavior of a diode is summarized by its V-I characteristic curve. In forward bias, the diode begins to conduct heavily once the applied voltage exceeds roughly 0.5V to 0.7V. In reverse bias, the diode is effectively "off" and blocks current until the voltage reaches a critical negative threshold known as the Breakdown Voltage (−VZK), at which point the current increases sharply in the negative direction.\n\n# The Ideal Diode Model\n\nThe ideal diode model is the simplest approximation used in circuit analysis. In this model, the diode acts like a simple switch. When forward-biased (v > 0), it is treated as a closed (ON) switch with zero resistance, meaning the current i > 0 while the voltage across the diode is ideally v=0. When reverse-biased (v < 0), it is treated as an open (OFF) switch, meaning the current through the diode is i=0.\n\nIdeal Model Examples:\n1. Basic Circuits: In a circuit with a 10V source and a 1kΩ resistor, a forward-biased ideal diode results in I=10mA and V=0. In a reverse-biased state, I=0 and the voltage across the diode is the full source voltage.\n2. Circuit (c): With a reverse-biased diode connected between a ground and a −5V potential, I=0A and the voltage drop V=0−(−5)=5V.\n3. Circuit (d): In a forward-bias configuration with a 5V source and a 2.5kΩ resistor, I=2.5kΩ5V=2mA and V=0.\n4. Circuit (e) - Multiple Diodes: When multiple diodes are in parallel at forward bias, the diode connected to the highest voltage source will be dominant. For sources of 3V and 2V, the 3V path dominates, resulting in V=3V and I=1kΩ3V=3mA.\n5. Circuit (f) - Highest Current Path: In more complex forward-biased networks, the diode that permits the highest current flow dominates. For a set-up involving a 5V source, a 1kΩ resistor, and a 1V cathode reference, I=1kΩ5V−1V=4mA and V=1V.\n\n# The Practical Diode Model\n\nThe practical diode model is more accurate than the ideal model because it accounts for the barrier potential loss. When a practical diode is forward-biased, it is equivalent to a closed switch in series with a small voltage source (VF), typically 0.7V for silicon. The positive terminal of this equivalent source is oriented toward the anode.\n\nPractical Model Examples:\n1. Circuit (c): In reverse bias, the behavior remains identical to the ideal model: I=0A and V=5V.\n2. Circuit (d): In forward bias with a 5V source and a 2.5kΩ resistor, the barrier potential reduces the available voltage across the resistor: I=2.5kΩ5V−0.7V=1.72mA. The voltage at the node is the barrier potential V=0.7V.\n3. Circuit (e): With 3V and 2V sources, the 3V source remains dominant. The current is calculated as I=1kΩ3V−0.7V=2.3mA. The resulting node voltage is V=2.3mA×1kΩ=2.3V.\n4. Circuit (f): In the highest-current dominant scenario with a 5V supply and a 1V cathode reference, the barrier potential is subtracted: I=1kΩ5V−1V−0.7V=3.3mA. The voltage at the measurement node is V=1V+0.7V=1.7V.