4.2 What's Inside a Router? (Part 1)

1. Detailed Router Architecture
  • Router Components: A router consists of four main components:

    • Input Ports: Perform physical and link layer functions, and most importantly, perform the lookup function to determine the output port.

    • Output Ports: Store packets received from the switching fabric and transmit them on the outgoing link.

    • Switching Fabric: The heart of the router that connects input ports to output ports.

    • Routing Processor: Executes routing protocols, maintains routing tables, and performs network management functions.

  • Control Plane vs. Data Plane:

    • Data Plane: Operates at nanosecond timescales; it is the hardware-implemented forwarding path that moves packets from input to output.

    • Control Plane: Operates at millisecond timescales; it is the software-driven logic (e.g., OSPF, BGP, or SDN controllers) that determines the paths packets take.

2. Input Port Processing and Lookup
  • Line Termination: The physical layer interface receiving the incoming signal.

  • Data Link Processing: Handles protocol-specific framing (e.g., Ethernet, PPP).

  • Lookup and Forwarding:

    • To achieve wire-speed forwarding, lookup must be performed in hardware.

    • Ternary Content Addressable Memory (TCAM): Specialized hardware used to perform lookups in constant time, O(1)O(1), regardless of table size.

  • Input Queuing: Occurs if the switching fabric is slower than the combined speed of input ports.

    • Head-of-the-Line (HOL) Blocking: A queued packet at the front of the line prevents following packets from moving forward, even if their output ports are available.

3. Forwarding Mechanisms
  • Destination-Based Forwarding: Unlike traditional switching, routers use IP address ranges to manage millions of potential destinations efficiently.

  • Longest Prefix Matching (LPM): When searching the forwarding table for a destination address, the router uses the entry with the longest matching prefix. This allows for hierarchical addressing and more specific routing rules.

4. Switching Fabric Technologies
  • Switching via Memory: The earliest method where the CPU controlled the transfer. Speed is limited by memory bandwidth (two crossings per packet).

  • Switching via Bus: Packets are transferred directly from input to output via a shared bus. Only one packet can cross the bus at a time; speed is limited by bus capacity.

  • Switching via Interconnection Network: Uses a complex fabric like a 2D mesh or Crossbar to allow multiple packets to be switched in parallel.

    • CLOS Networks: Multi-stage interconnection networks that provide non-blocking paths and scalability for massive backbone routers.

5. Output Port Processing and Buffering
  • Buffering: Required when packets arrive from the fabric faster than the output link speed.

    • Rule of Thumb: The amount of buffering (BB) should be equal to the average Round Trip Time (RTTRTT) multiplied by the link capacity (CC), expressed as B=RTTimesCB = RTT imes C.

    • Recent Research: Suggests that for $N$ flows, the buffer size can be reduced to B=racRTTimesCNB = rac{RTT imes C}{\sqrt{N}}.

  • Scheduling Disciplines: Determines which packet to send next:

    • First-In-First-Out (FIFO)

    • Priority Queuing: Segregates traffic into classes (e.g., Voice vs. Data).

    • Weighted Fair Queuing (WFQ): Provides guaranteed bandwidth for different traffic flows.

  • Packet Discard Policy: If the buffer is full, the router must decide which packet to drop (e.g., Tail Drop, Random Early Detection).

6. Performance and Scalability
  • Switching Capacity: Throughput is maximized by hardware parallelism. High-end routers can reach capacities in the tens of Terabits per second (Tbps).

  • Fabric Plane Parallelism: Modern routers use multiple switching fabric cards in parallel to ensure redundancy and higher aggregate throughput.