Processor Components and the Fetch-Execute Cycle

The processor, also known as the Central Processing Unit (CPU), is the core component of a computer system.
It consists of several distinct components, each designated to perform a specific role: * Control Unit (CU) * Buses * Arithmetic-Logic Unit (ALU) * Dedicated Registers

The Control Unit is the part of the processor responsible for coordinating the activity of all other components within the computer.
It acts similarly to a conductor in an orchestra, directing and managing the various parts of the system to ensure they work together to achieve the execution of program instructions.
It manages the flow of data and instructions by sending control signals along the control bus to other components.

Definition of a Bus: A bus in a computer consists of a series of physical connectors (lines) that transfer electrical signals between internal components.
Bus Width: Microprocessor buses typically consist of a specific number of lines, such as $8$ , $16$ , $32$ , or $64$ lines.
The System Bus: The system bus is a collective term for three separate buses that carry specific types of information: * Control Bus: Carries control signals from the Control Unit. * Address Bus: Carries memory addresses specifying where data should be read from or written to. * Data Bus: Transports the actual data between the processor and other components.

The Control Unit sends specific signals to regulate computer operations. These include: * Memory read: This signal causes data from the addressed location in the Random Access Memory (RAM) to be placed onto the data bus. * Memory write: This signal causes data currently on the data bus to be written into the specified, addressed location within the RAM. * Bus request: This signal indicates that a specific device is requesting permission to use the data bus. * Bus grant: This signal indicates that the CPU has granted a device access to use the data bus. * Clock: This signal is used to synchronise the operations of the various components across the system.

The ALU is described as the "problem-solving" part of the processor.
It is responsible for performing three main types of operations on data: * Arithmetic operations: These include addition ( $+$ ), subtraction ( $-$ ), multiplication ( $\times$ ), and division ( $/$ ). * Logical operations: These involve Boolean logic, specifically the operations $AND$ , $OR$ , $NOT$ , and $XOR$ . * Shift operations: These involve moving bits to the left or to the right within a register to perform certain mathematical or data manipulation tasks.

Registers: To avoid writing working data back to the relatively "slow" main memory, processors use several locations of super-fast memory called registers. These are used to store results and data temporarily.
Accumulator (ACC): For simplification, the processor is considered to have a single general-purpose register called the accumulator. * Results from the ALU are stored in the accumulator. * The processor can immediately access and re-use these stored results in subsequent calculations. * Example: In the calculation $2 + 3 + 4$ , the result of $2 + 3$ would be stored in the accumulator before $4$ is added to it.

Executing instructions requires the processor to hold several pieces of information simultaneously, such as the current instruction, data addresses, and the address of the next instruction. The following dedicated registers are used: * Program Counter (PC): Holds the memory address of the next instruction to be executed. * Current Instruction Register (CIR): Holds the instruction currently being executed. This instruction is split into two parts: the opcode and the operand. * Memory Address Register (MAR): Holds the address in memory from which the processor is required to fetch data, or the address to which data is to be stored. * Memory Data Register (MDR): Temporarily holds the data that is moving between the processor and the main memory. * Accumulator (ACC): Holds the intermediate results of an instruction or calculation.

Processors operate in defined, repeating stages to carry out program instructions. This process is known as the Fetch-Execute (or Fetch-Decode-Execute) cycle.

The address of the next instruction is copied from the Program Counter (PC) to the Memory Address Register (MAR).
The instruction held at the address specified in the MAR is copied to the Memory Data Register (MDR).
Simultaneously, the contents of the Program Counter (PC) are incremented by $1$ so that it points to the next instruction in the sequence.
The contents of the Memory Data Register (MDR) are then copied into the Current Instruction Register (CIR).

The instruction currently held in the CIR is decoded by the Control Unit.
The instruction is split into the opcode and the operand to determine the type of instruction and what needs to be done. * Opcode: Specifies the operation that is to be carried out (e.g., ADD, SUB). * Operand: This holds either the actual data to be operated on or the memory address of the data to be used.
If the operand is an address, that address is copied to the MAR. If additional data is required, it is fetched from memory and passed to the MDR, and then eventually passed to the accumulator.

The instruction is executed. The final result of the operation is either held in the accumulator or stored back into the main memory.

The main components of the processor that facilitate this cycle are: * The Arithmetic-Logic Unit (ALU) * The Control Unit (CU) * The Registers (PC, ACC, MAR, MDR, CIR) * The System Bus (Control, Address, and Data buses)