Computer Organisation: Course Syllabus, Computer Evolution, and System Architectures
Course Structure and Assessment Guidelines
Assessment Scheme Breakdown:
Part 1: Coursework (CW) = 60%
Midterm Test: 25%
Online Quizzes: 15%
Practical Test: 20%
Part 2: Final Examination (FE) = 40%
Final Examination is conducted face-to-face in the Examination Hall.
Passing Requirements:
Total available mark = 100%.
The minimum overall passing mark for the subject is 40%.
Students must pass both parts (Coursework and Final Examination) individually to pass the subject.
Weekly Syllabus Schedule:
Week 1: Lecture on Overview of Computer Systems & Evolution of Computers and Data Representation.
Week 2: Lecture on Computer Arithmetic 1: Simple Addition and Subtraction and Computer Arithmetic 2: Sign Magnitude & 1's and 2's Complement. Tutorial on Data Representation.
Week 3: Lecture on Floating Point Representation and Arithmetic. Tutorial on Computer Arithmetic.
Week 4: Lecture on Logic Gates and Combinational Circuits. Tutorial on Floating Point Representation & Arithmetic. Assessment: Quiz 1.
Week 5: Lecture on Boolean Algebra and Simplification. Tutorial on Floating Point Representation & Arithmetic (continued) and Logic Gates and Combinational Circuits.
Week 6: Lecture on Functional Logic Circuits (Part 1) and Functional Logic Circuits (Part 2). Tutorial on Logic Gates and Combinational Circuits. Assessment: Mid Term Test.
Week 7: Lecture on Functional Logic Circuits (Part 3). Tutorial on Boolean Algebra and Simplification.
Semester Break
Week 8: Lecture on Basic Microprocessor Architecture (including functions of different units). Tutorial on Functional Logic Circuit.
Week 9: Lecture on Addressing Modes and Formats. Practical/Tutorial: Introduction to Intel 8085 Simulator and Practical: Assembly Language Programming.
Week 10: Lecture on Instruction Sets. Practical: Assembly Language Programming (continued).
Week 11: Lecture on Input/Output. Assessment: Practical Test conducted during the week.
Week 12: Lecture on Pipelining. Tutorial on Input/Output and Pipelining.
Week 13: Lecture on Cache, Internal and External Memory. Assessment: Quiz 2 (MCQ) conducted during the week.
Week 14: Revision.
Bibliographic References:
Main Reference:
Stallings, W., 2019. Computer Organization and Architecture: Designing for Performance. 11th ed. Pearson.
Other References:
Null, L. and Lobur, J., 2015. The Essentials of Computer Organization and Architecture. Enhanced 4th ed. Jones & Bartlett Learning.
Hennessy, J. L., and Patterson, D. A., 2011. Computer Architecture: A Quantitative Approach. 5th ed. Morgan Kaufmann.
Required Software Tools:
8085 Microprocessor Simulator:
https://gnusim8085.srid.ca/download— Utilized for Assembly Language Programming exercises and practicals.Logisim Software Simulator:
http://www.cburch.com/logisim/— Utilized for designing and simulating combinational logic circuits.
Overview of Computer Systems
Definition of a Computer:
A computer is an electronic device that receives input, stores or processes that input according to user-supplied instructions, and provides output in a desired format.
It is designed to execute diverse applications and services. Functional applications include mathematical calculations, word processing, software execution algorithms, or complex flight simulators, simply by modifying the instruction sequence stored within its memory.
Computer Architecture vs. Computer Organization:
Computer Architecture (Software Structure):
Refers to system attributes visible to a programmer (i.e., attributes that have a direct impact on the logical execution of a program).
Includes instruction set design, supported data types, addressing modes, and memory addressing mechanisms.
Often used interchangeably with the term Instruction Set Architecture (ISA).
Computer Organization (Hardware Structure):
Refers to the operational units and their interconnections that realize the architectural specifications.
Includes hardware details such as control signals, interfaces between the computer and peripherals, memory technology used, input/output mechanisms, and specific bit representation strategies for data types.
Basic Functional Units of a Computer:
An operational computer system consists of four primary hardware functional categories: Input Unit, Memory Unit, Central Processing Unit (CPU), and Output Unit.

* **Input Unit:**
* Devices utilized to input raw data and instructional commands into the system.
* Examples: Keyboards, mice, scanners, digital cameras, environmental sensors, and microphones.
* **Memory Unit:**
* Stores all incoming raw data, software instructions, intermediate processing states, and output data prior to generation.
* Examples: Registers, main memory (RAM), hard disk drives (HDDs), solid-state drives (SSDs), floppy disks, and magnetic tape systems.
* **Central Processing Unit (CPU):**
* Functions as the core brain of the computer system.
* Executes basic arithmetic operations, logical decision-making, and system-wide control/coordination operations specified by instructions.
* Contains internal sub-components:
* **Control Unit (CU):** Directs and manages the operational sequences of the processor.
* **Arithmetic/Logic Unit (ALU):** Performs micro-operations for mathematical calculations and bitwise logical manipulations.
* **Registers and Cache:** High-speed storage elements internal to or adjacent to the CPU for holding immediate data operands and addresses.
* **Output Unit:**
* Devices used to present processed data/information to the user or an external system in a human-readable or machine-usable format.
* Examples: Displays/Monitors, printers, projectors, and speakers.
System Software & Hardware Interaction:
Hardware: The physical tangible components (motherboard, CPU, memory modules, storage drives, peripherals).
Software: The logical sequences of instructions executed by hardware (text processors, graphics editors, spreadsheets, mapping utilities, video editing applications).
Operating System (OS): The fundamental system software that manages hardware and software resources, provides security, handles memory allocation, manages files, and delivers common standardized services for user application execution.
First Generation Computers & Von Neumann Architecture
First Generation Characteristics:
Built primarily using vacuum tubes as the underlying electronic switching component.
Programming was performed manually by setting physical switches and routing interconnecting cables on plugboards.
Data and early instructions were supplied via physical punched cards.
The IAS Computer:
Designed by John von Neumann.
Introduced the stored-program concept, wherein program instructions and operational data reside together in the same internal electronic memory space, eliminating the requirement to manually reconfigure hardwired patch cables or repeatedly feed punched cards during execution.
Served as the structural prototype for virtually all subsequent general-purpose computers.
Another prominent example of first-generation computing hardware was the ENIAC (1947).
Von Neumann Architecture Components:

* **Control Unit (CU):** Supervises and controls data transfers among internal registers, memory, and peripheral devices, while signaling the ALU regarding which mathematical or logical operation to perform.
* **Arithmetic and Logic Unit (ALU):** Performs arithmetic operations (e.g., addition, subtraction) and logical evaluation microoperations.
* **Internal Registers:** High-speed, small-capacity memory locations within the CPU used to hold intermediate data, memory pointers, and instruction codes.
* **Main Memory Unit:** Holds stored programs (instructions) and data operands in linearly addressable storage cells.
* **Input/Output (I/O) System:** Interfaces the CPU and main memory with peripheral input/output equipment.
* **Busses:** Interconnecting signal conductors used to route data bits, address lines, and control timing signals among the CPU, Memory, and I/O units.
* **Control Priority:** Main memory access and I/O operations are coordinated directly by the CPU.
The Fetch-Decode-Execute Cycle:
Modern stored-program computers continuously perform the standard fetch-decode-execute instruction cycle:
Fetch: The Control Unit fetches the next instruction code from main memory at the location currently indicated by the Program Counter () register.
Decode: The Control Unit interprets the operational bit pattern (opcode) of the fetched instruction to determine the required actions.
Operand Fetch: Any required data operands specified by the instruction's addressing fields are retrieved from main memory or registers.
Execute: The ALU executes the instruction (e.g., performs an arithmetic operation or logical check) and saves the output to a designated destination register.
Store/Writeback: The resulting data value is transferred back to main memory if specified by the instruction sequence.
Second and Third Computer Generations
Second Generation Computers (1956–1963):
Replaced bulky vacuum tubes with discrete solid-state transistors.
Transistors allowed computers to become significantly smaller, cheaper, less power-hungry, and more reliable.
Computers gained the capability to process higher-complexity arithmetic and logical computations.
Pioneered the usage of low-level assembly tools and early high-level programming languages.
Key Example: The IBM 1401, introduced in 1959.
Third Generation Computers (1964–1971):
Transitioned from individual discrete transistors to Integrated Circuits (ICs), allowing multiple electronic components (transistors, resistors, diodes) to be fabricated onto a single semiconductor silicon chip.
Digital computers built with IC technology rely on two basic foundational component primitives:
Logic Gates: Dedicated circuits used for processing and manipulating binary data.
Memory Cells: Dedicated hardware configurations used for binary data storage.
Logic Gate Specifications:

* **NOT Gate (Inverter):**
* *Function:* Accepts a single input bit and outputs its logical opposite.
* *Notation:*
* **AND Gate:**
* *Function:* Outputs a logic high ( or ON) if and only if all input signals are high ().
* *Notation:* or
* **NAND Gate (Not-AND):**
* *Function:* Performs an AND operation on inputs, then applies a NOT operation to the resulting output. Yields low () only when all inputs are high ().
* *Notation:*
* **OR Gate:**
* *Function:* Outputs a logic high ( or ON) if at least one input signal is high ().
* *Notation:*
* **NOR Gate (Not-OR):**
* *Function:* Performs an OR operation on inputs, then applies a NOT operation to the result. Yields high () only when all inputs are low ().
* *Notation:*
* **XOR Gate (Exclusive OR):**
* *Function:* Outputs high () if exactly one input is high (). Outputs low () if both inputs are simultaneously high () or both are low ().
* *Notation:*
* **XNOR Gate (Exclusive Not OR):**
* *Function:* Outputs high () if all inputs are identical (either all high or all low). Outputs low () if inputs differ.
* *Notation:* Memory Cells Structure:

* **Single DRAM Memory Cell:** Consists of a single control transistor connected to an Address (Word) Line and a Storage Capacitor connected to a Bit Line and Ground.
* **Memory Cell Array Structure:** Organized in two-dimensional grid layouts where individual bit storage cells are selectively accessed using Row Address Strobe () lines and Column Address Strobe () lines.
* *Hardware Abstraction Hierarchy:* Central Processing Unit (CPU) Logic Gates Discrete Transistors.
Moore's Law & Semiconductor Scaling:

* **Moore's Law Statement:** Formulated by Gordon Moore; states that the density of transistors that can be packed onto a single integrated circuit chip doubles approximately every year (or 18 to 24 months).
* **Engineering & Commercial Impacts:**
* The unit cost of computer logic gates and memory circuits has declined dramatically.
* Electrical path lengths on-chip are significantly shortened, drastically increasing operating clock speeds.
* Physical computer size shrinks, facilitating portability.
* Overall system power consumption and cooling demands decrease.
* Fewer individual interchip interconnects are required because complete complex circuits fit on a single chip, increasing system reliability.
* *Key Third Generation System:* The **IBM System/370** (introduced in 1970). It introduced backward-compatible architectural family concepts, allowing customers to upgrade hardware without discarding existing software application code.
Programming Language Hierarchy
Programming environments are structured in hierarchical generations classified by abstraction level, moving from machine-oriented low-level syntax to problem-oriented high-level code:

* **1st Generation Languages (1GL):** Native **Machine Languages**. Executable binary codes consisting entirely of raw s and s. Highly machine-oriented.
* **2nd Generation Languages (2GL):** **Assembly Languages (Assemblers)**. Replaces binary opcodes with human-readable textual mnemonics (e.g., `MOV`, `ADD`), requiring an assembler to translate into machine code.
* **3rd Generation Languages (3GL):** **Procedural / High-Level Languages**. Problem-oriented notations offering higher software development productivity. Categorized by domain:
* *Scientific Domain:* **FORTRAN** (1955).
* *Business Domain:* **COBOL** (1959).
* *Multipurpose Domain:* **BASIC** (1965), **Pascal** (1968).
* **4th Generation Languages (4GL):** Advanced non-procedural tools, query languages, and database abstraction environments designed for specialized application development.
Microprocessor Evolution and ISA Paradigms
Birth of the Microprocessor:
A microprocessor contains all necessary central processing unit (CPU) components (Control Unit, ALU, registers) combined onto a single integrated circuit chip.
Historical Timeline of Intel Processors:
Intel 4004: The first commercial single-chip microprocessor; 4-bit word architecture capable of performing 4-bit addition.
Intel 8008: Early 8-bit architecture microprocessor.
Intel 8080: The first true general-purpose 8-bit microprocessor.
Intel 8086: A powerful 16-bit microprocessor chip that marked the commercial debut of the foundational x86 instruction set architecture.
Modern Microprocessors: Exemplified by complex multi-core chips such as 9th Generation Intel Core i9 processors.
CISC vs. RISC Processor Architectures:
CISC (Complex Instruction Set Computer):
Emphasis: Hardware-centric architecture.
Characteristics: Includes a large, diverse set of variable-length instructions, some of which execute complex multi-step tasks taking multiple clock cycles.
Primary Example: The x86 architecture (dominant in desktop and server computing environments).
RISC (Reduced Instruction Set Computer):
Emphasis: Software- and compiler-centric architecture.
Characteristics: Utilizes a smaller set of highly streamlined, standardized instructions designed to execute in a single uniform clock cycle.
Primary Example: The ARM architecture (dominant in modern mobile hardware, consumer electronics, and embedded systems).
Embedded Systems, IoT, and Cloud Computing
Embedded Systems:
A specialized combination of computer hardware, software firmware, and supplementary mechanical or physical parts configured to perform a dedicated, fixed functional task.
Examples: Office printers, photocopiers, digital cameras, microwave ovens, coffee machines, and automotive controllers.
Internet of Things (IoT):
Formed when individual embedded computing systems are equipped with network connectivity hardware, enabling them to communicate, gather data, and share operational control signals over the Internet.
Cloud Computing:

* *Definition:* The on-demand delivery of virtualized computing capabilities—including processing servers, data storage, enterprise databases, network connections, software applications, and analytics engines—over the Internet ("the cloud").
* *Operational Shift:* Organizations eliminate the necessity of buying, building, or maintaining on-premise physical data centers and server racks. Instead, hardware and software resources are rented and scaled dynamically from public cloud service infrastructure providers such as Amazon Web Services (AWS), Microsoft Azure, or Google Cloud Platform (GCP).
* *Deployment Models:* Private Cloud, Public Cloud, and Hybrid Cloud architectures across mobile devices, remote applications, cloud databases, and enterprise servers.