Field Effect Transistor (FET) Comprehensive Study Notes

Introduction to Field-Effect Transistors (FETs)

• Definition: A Field-Effect Transistor (FET) is a type of transistor that utilizes an electric field to regulate the flow of current. It is primarily used in electronic circuits for the amplification or switching of signals.

• Terminals: The FET is a three-terminal device consisting of:     * Gate (G): The controlling terminal.     * Source (S): The terminal where current enters the device.     * Drain (D): The terminal where current exits the device.

• Control Mechanism: The FET is a voltage-controlled device. This differs from bipolar transistors, which are current-controlled.

• Physical Basis of the Name: The term "field effect" refers to the establishment of an electric field by present charges. This field controls the conduction path of the output circuit without requiring direct electrical contact between the controlling and controlled quantities.

• Polarity Types: Similar to BJT types ($npn$ and $pnp$), FETs are categorized based on their channel material:     * n-channel: Current conduction is predominantly via electrons.     * p-channel: Current conduction is predominantly via holes.

Comparative Analysis: BJT vs. FET

• Bipolar Junction Transistor (BJT):     * Control: Current controlled device.     * Conduction: Bipolar (conduction involves both holes and electrons).     * Input Impedance: Low compared to FET.     * Stability: Less temperature stable.     * Physical Size: Larger in size.

• Field-Effect Transistor (FET):     * Control: Voltage controlled device.     * Conduction: Unipolar (conduction is due to the flow of majority charge carriers only).     * Input Impedance: High input impedance.     * Stability: More temperature stable.     * Physical Size: Smaller in size.

Classification of FETs

• Junction Field-Effect Transistor (JFET): Controlled by a reverse-biased p-n junction.     * Subtypes: N-channel and P-channel.

• Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET): Also known as an Insulated Gate Field Effect Transistor (IGFET).     * Depletion-type (D-MOSFET): Can operate in both depletion and enhancement modes.     * Enhancement-type (E-MOSFET): Operates only in enhancement mode.     * Subtypes for both: N-channel and P-channel.

• Metal-Semiconductor Field-Effect Transistor (MESFET).

Junction Field-Effect Transistor (JFET) Structure and Principle

• Basic Principle: The JFET acts as a voltage-controlled resistor where channel resistance is adjusted via the gate voltage. It is a "normally-on" device, meaning current flows when $V_{GS} = 0\,V$.

• Component Regions:     * Source (S): The region/terminal where current enters.     * Drain (D): The region/terminal where current exits.     * Channel: The conducting path between the source and drain. In an n-channel JFET, this is n-type material.     * Gate (G): The terminal connected to a p-type semiconductor (for n-channel) that forms a p-n junction with the channel. It is typically reverse-biased to control conductivity.

• Gate-Source Voltage ($V_{GS}$): The specific voltage applied between the gate and source terminals to regulate the channel.

Physics of JFET Operation (N-Channel)

• Charge Carriers: In an n-channel JFET, current is carried by electrons. In a p-channel JFET, current is carried by holes.

• Conductivity Control:     * In an n-channel FET, positive gate voltage attracts electrons to the channel, increasing conductivity (though in JFETs, the gate is typically reverse-biased/negative).     * In a p-channel FET, negative gate voltage attracts holes to increase conductivity.

• Reverse Bias Effect: When a negative voltage is applied to the gate relative to the source (V_{GS} < 0), the p-n junction becomes reverse-biased.

• Depletion Region: As the reverse-bias voltage increases, the depletion region of the p-n junction widens. This physically depletes the channel of free charge carriers.

• Reduced Channel Conductivity: The widening depletion region reduces the effective width of the conductive channel, restricting the flow of current from source to drain ($I_D$).

• Pinch-off: When the reverse-bias voltage is sufficiently large, the depletion regions from both sides meet. This "pinches off" the channel, effectively stopping current flow and putting the device in the "off" state.

JFET Operational Modes

• Ohmic or Linear Region (Active Mode):     * Condition: Small $V_{DS}$ and less negative $V_{GS}$.     * Behavior: The JFET behaves like a variable resistor. Current ($I_D$) increases as $V_{DS}$ increases, but the rate of increase is controlled by $V_{GS}$.

• Saturation (Pinch-Off) Region:     * Condition: $V_{GS}$ is sufficiently negative and $V_{DS}$ is large enough to cause channel pinch-off.     * Behavior: Current ($I_D$) becomes almost constant and independent of further increases in $V_{DS}$. In this region, $I_D$ is controlled solely by $V_{GS}$.     * Maximum Current: At the pinch-off point, current is at its maximum for a given $V_{GS}$. This maximum current at $V_{GS} = 0\,V$ is labeled $I_{DSS}$.

• Important Operational Conditions:     * $V_{GS}$ for N-channel: Must be negative (V_{GS} < 0). More negative values reduce current.     * $V_{DS}$ for N-channel: Must be positive for current to flow from source to drain.     * Pinch-off Voltage ($V_P$): The value of $V_{GS}$ where the current becomes zero, or the value of $V_{DS}$ where saturation begins at $V_{GS} = 0\,V$.

Transfer Characteristics and Applications

• Transfer Curve: A plot of Drain Current ($I_D$) versus Gate-Source Voltage ($V_{GS}$) at a constant $V_{DS}$. As $V_{GS}$ becomes more negative, $I_D$ decreases until cutoff.

• JFET as a Switch:     * "On" State (Conducting): Triggered when $V_{GS} = 0\,V$ (or slightly positive in n-channel). The depletion region is narrow, allowing current flow. The channel is conductive.     * "Off" State (Non-Conducting): Triggered by applying a negative $V_{GS}$. This expands the depletion region until the channel is blocked. The JFET acts as an open switch.     * Common Uses: Analog switches, low-power switches, sensor interfaces, and audio amplifiers due to low noise and high input impedance.

Depletion-Type MOSFET (D-MOSFET)

• Construction Details:     * Built on a p-type substrate (silicon base).     * Source and Drain terminals are connected to n-doped regions, which are linked by a physical n-channel.     * Substrate Terminal (SS): Often internally connected to the source, but can be a fourth external terminal.     * Insulation: The gate is connected to a metal contact but insulated from the channel by a thin layer of Silicon Dioxide ($SiO_2$).     * $SiO_2$ Role: Acts as a dielectric (insulator) that sets up opposing electric fields. This prevents direct electrical connection between the gate and channel, resulting in extremely high input impedance.

• Basic Operation:     * $V_{GS} = 0\,V$: Applying $V_{DD}$ across drain-source attracts free electrons in the n-channel. The resulting current is $I_{DSS}$.     * Depletion Mode (V_{GS} < 0): The negative gate potential repels electrons toward the p-type substrate and attracts holes from the substrate. This causes recombination, reducing the number of free electrons in the n-channel. Increasing negative bias further reduces $I_D$ until pinch-off (e.g., $-6\,V$).     * Enhancement Mode (V_{GS} > 0): The positive gate attracts additional free electrons from the p-type substrate (due to reverse leakage and collisions). This "enhances" the carrier level beyond what is available at $V_{GS} = 0\,V$, causing $I_D$ to increase rapidly.

Enhancement-Type MOSFET (E-MOSFET)

• Structural Difference: Unlike the D-MOSFET, the E-MOSFET has no pre-constructed channel between the two n-doped regions.

• Basic Operation:     * At $V_{GS} = 0\,V$: Current is effectively $0\,A$ because no path exists between the source and drain. Two reverse-biased p-n junctions oppose flow.     * Channel Formation: When a positive $V_{GS}$ is applied (greater than $0\,V$), the positive gate potential repels holes from the p-substrate surface near the $SiO_2$ layer.     * Induced Channel: Minority carriers (electrons) in the p-substrate are attracted to the positive gate, accumulating near the $SiO_2$ surface. Since the $SiO_2$ is an insulator, electrons are not absorbed by the gate but form an induced n-type region.     * Threshold Voltage ($V_T$ or $V_{GS(Th)}$): The specific level of $V_{GS}$ required to create an induced channel capable of supporting measurable current flow.     * Saturation/Pinching: Increasing $V_{GS}$ beyond $V_T$ increases charge carrier density and $I_D$. However, if $V_{DS}$ is increased while holding $V_{GS}$ constant, the channel narrows at the drain end, eventually reaching a saturation level similar to JFET behavior.

Questions & Discussion

• Q.1: Give differences and similarities between BJT and FET.

• Q.2: Draw the schematic diagram for construction of n channel JFET.

• Q.3: How will you connect battery polarities to obtain input and output characteristics of n channel KFET [sic - JFET].

• Q.4: Draw the Drain current vs Drain to source voltage characteristics for JFET and explain why do we get this shape.

• Q.5: Explain use of JFET as switch.

• Q.6: What are the limitations of JFET and how MOSFET overcomes them.

• Q.7: Write in detail the construction and function of E-MOSFET.

• Q.8: Write the differences between E-MOSFET and D-MOSFET.