Control Unit Design and Computer Arithmetics

Control Unit Design

Control Memory

• Microprogram:
  • A program stored in memory that generates control signals to execute instructions.
  • Consists of microinstructions containing a control word and a sequencing word.
    • Control Word: Control information for one clock cycle.
    • Sequencing Word: Information for determining the next microinstruction address.
• Control Memory (CS):
  • Storage in the microprogrammed control unit to store the microprogram.
• Writeable Control Memory (WCS):
  • A CS whose contents can be modified, allowing changes to the microprogram and instruction set.

Address Sequencing

• Sequencing Capabilities:
  • Incrementing the control address register.
  • Unconditional and conditional branches.
  • Mapping from machine instruction bits to a control memory address.
  • Subroutine call and return facility.
• Mapping of instructions to microroutines involves mapping the OP-code of an instruction to the starting microinstruction address.

Microprogram Example

• Computer Configuration includes memory, MUX, Arithmetic logic unit, registers AC, SBR, and CAR, and a control unit.
• Machine Instruction Format includes fields for opcode and address.
• Microinstruction Format includes fields F1, F2, F3 (microoperation fields), CD (condition for branching), BR (branch field), and AD (address field).
• Symbolic Microinstructions:
  • Symbols are used similarly to assembly language, and a microprogram assembler translates them into binary equivalents.

Design of Control Unit

• Decoding ALU Control Information using decoders for microoperation fields (F1, F2, F3).
• Microprogram Sequencer determines the next microinstruction address.
  • Subroutine CALL uses MUX-1 to select an address source and route it to the CAR.
  • Address source selection includes In-Line (CAR + 1), RETURN (SBR output), Branch/CALL (CS(AD)), and MAP.
• Condition and Branch Control uses input logic and MUX2 to select the next address based on condition and branch control.

Hardwired Control vs. Microprogrammed Control

• Hardwired Control:
  • Circuit-based using flip-flops, gates, decoders.
  • Fixed instruction format, register-based instructions.
  • Faster decoding but difficult to modify; smaller chip area.
• Microprogrammed Control:
  • Software-based using microinstructions to generate control signals.
  • Variable instruction format, not register-based.
  • Slower decoding but easily modified; larger chip area.

Computer Arithmetic

Addition and Subtraction with Signed-Magnitude Data

• Addition Algorithm:
  • Identical Signs: Add magnitudes and attach the sign of A to the result.
  • Different Signs: Compare magnitudes and subtract the smaller from the larger.
    • If A > B, result sign is the same as A.
    • If A < B, result sign is the complement of A.
    • If $A = B$, subtract B from A and make the sign positive.
• Subtraction Algorithm:
  • Different Signs: Add magnitudes and attach the sign of A to the result.
  • Identical Signs: Compare magnitudes and subtract the smaller from the larger.
    • If A > B, result sign is the same as A.
    • If A < B, result sign is the complement of A.
    • If $A = B$, subtract B from A and make the sign positive.
• Hardware Implementation:
  • Uses a parallel adder and complementer to perform addition and subtraction based on the mode control signal M.

Addition and Subtraction with Signed 2’s Complement Data

• Representation:
  • Leftmost bit represents the sign (0 for positive, 1 for negative).
  • Negative numbers are in 2’s complement form.
• Addition:
  • Add numbers including sign bits; discard carry-out of the sign-bit position.
• Subtraction:
  • Take 2’s complement of subtrahend B and add to minuend A.
• Overflow Detection:
  • Detected when the last two carries are applied to an exclusive OR gate, and the output is 1.

Multiplication Algorithms

• Signed-Magnitude Data:
  • Use an adder for two binary numbers and accumulate partial products.
  • Shift the partial product to the right instead of shifting the multiplicand to the left.
  • If the multiplier bit is 0, no need to add zeros to the partial product.
  • The final product is in A and Q registers.
• Booth Multiplication Algorithm:
  • Multiplies binary integers in signed-2’s complement representation.
  • Strings of zeros require shifting only; a string of 1’s from $2^k$ to $2^m$ can be treated as $2^{k+1} – 2^m$.
  • Rules:
    • Subtract multiplicand upon encountering the first 1 in a string of 1’s.
    • Add multiplicand upon encountering the first 0 after a string of 1’s.
    • No change when the multiplier bit is identical to the previous bit.

Division Algorithms

• Unsigned Binary Integers:
  • Uses partial remainders, divisor, dividend, and quotient.
  • Algorithm involves comparing the divisor with the partial remainder and performing subtraction and shifting operations to generate the quotient and remainder.
• Restoring Division:
  • If the result of subtraction is negative, the dividend has to be restored, by adding the divisor to the negative result.