MOS Structures Notes

Introduction

• The Metal-Oxide-Semiconductor (MOS) structure is the core component of the MOSFET.

Two-Terminal MOS

• The metal in a MOS structure can be aluminum, another metal, or high-conductivity polycrystalline silicon.
• The term "metal" is commonly used regardless of the actual material.
• $t_{ox}$ represents the thickness of the oxide layer.
• $\epsilon_{ox}$ is the permittivity of the oxide layer.

Voltage Application and Charge Behavior

Negative Voltage

• When a negative voltage (-V) is applied to the top plate of the MOS capacitor:
  • An electric field (E-field) is induced between the two plates.
  • For a p-type substrate, majority carrier holes move towards the interface, creating an accumulation layer.

Positive Voltage

• When a positive voltage (+V) is applied to the metal:
  • For a p-type substrate, majority carrier holes move away from the interface.
  • This movement creates an induced space charge region due to the acceptor doping concentration ($N_A$).
  • $N_A^-$ corresponds to the negative charge on the bottom "plate" of the MOS.

Energy Band Diagrams

VG = 0 (Flat Band Condition)

• Energy bands in the semiconductor are flat, indicating zero net charge.
• This condition is known as flat band and assumes ideal conditions.

VG = -VE (Accumulation)

• The energy bands ($E<em>C$, $E</em>V$, and $E_{Fi}$) bend upwards.
• $E<em>V$ is closer to the Fermi level ($E</em>F$) at the interface, indicating an accumulation of holes.
• The semiconductor surface appears more p-type than the bulk material.
• $E_F$ is constant in the semiconductor because the system is in thermal equilibrium with no current through the oxide.

VG = +VE (Depletion)

• The energy bands ($E<em>C$, $E</em>V$, and $E_{Fi}$) bend downwards.
• $E<em>C$ and $E</em>{Fi}$ move closer to $E_F$.
• A space charge region, similar to that in a PN junction, is created.
• The induced space charge width is denoted as $x_d$, and it increases with increasing +VG.
• $E_F$ remains constant in the semiconductor.

VG = ++VE (Inversion)

• The energy bands ($E<em>C$, $E</em>V$, and $E_{Fi}$) bend further downwards.
• $E<em>C$ moves even closer to $E</em>F$, and $E<em>{Fi}$ crosses over $E</em>F$.
• The induced space charge width increases until it reaches a maximum, $x_{dT}$.
• An inversion layer of electrons is created at the oxide–semiconductor interface, inverting the semiconductor surface from P-type to N-type.

Depletion Layer Thickness ($x_d$)

• The width of the induced space charge region, $x_d$, adjacent to the oxide–semiconductor interface can be calculated.
• The bulk potential, $\Phi<em>{fp}$, is the difference (in V) between $E</em>{Fi}$ and $E<em>F$ and is given by: $\Phi</em>{fp} = V<em>t \ln(\frac{N</em>a}{n_i})$
  • $N_a$ is the acceptor doping concentration.
  • $n_i$ is the intrinsic carrier concentration.
  • $V_t$ is the thermal voltage.

Surface Potential ($\Phi_s$)

• The potential $\Phi_s$ is called the surface potential.
• It is the difference (in V) between $E<em>{Fi}$ measured in the bulk semiconductor and $E</em>{Fi}$ measured at the surface.
• The surface potential is the potential difference across the space charge layer and defines the band-bending in the semiconductor.

Space Charge Width ($x_d$) Equation

• The equation assumes the abrupt depletion approximation is valid.
• $x<em>d = \sqrt{\frac{2\epsilon</em>s \Phi<em>s}{eN</em>a}}$
  • $\epsilon_s$ is the permittivity of the semiconductor.

Maximum Depletion Layer ($x_{dT}$)

• When $\Phi<em>s = 2\Phi</em>{fp}$, the electron concentration at the surface is the same as the hole concentration in the bulk material.
• This condition is known as the onset of strong inversion or the threshold condition.
• The applied gate voltage creating this condition is known as the threshold voltage.
• If VG increases above this threshold value, $E<em>C$ bends slightly closer to $E</em>F$, but the change in $E_C$ at the surface is now only a slight function of VG.
• The electron concentration, $n<em>p$ at the surface is an exponential function of $\Phi</em>s$.
• If $\Phi<em>s$ increases by a few $\frac{kT}{e}$ volts, $n</em>p$ increases by orders of magnitude.
• The space charge width changes only slightly.
• The space charge region has essentially reached a maximum width, $x_{dT}$.
• $x<em>{dT}$ can be calculated from the previous equation by setting $\Phi</em>s = 2\Phi_{fp}$:
  • $x<em>{dT} = \sqrt{\frac{4\epsilon</em>s \Phi<em>{fp}}{eN</em>a}}$

Example 2.1

• Calculate the maximum space charge width, $x_{dT}$ for a given semiconductor doping concentration.
• Consider silicon at T = 300 K doped to $N_a = 10^{16} cm^{-3}$.
• The intrinsic carrier concentration is $n_i = 1.5 \times 10^{10} cm^{-3}$.
• Solution:
  • $x<em>{dT} = \sqrt{\frac{4\epsilon</em>s \Phi<em>{fp}}{eN</em>a}} = \sqrt{\frac{4(11.7)(8.85 \times 10^{-14})(0.3473)}{(1.6 \times 10^{-19})(10^{16})}} = 0.30 \times 10^{-4} cm = 0.30 \mu m$

Work Function Difference ($\Phi_{ms}$)

• Previously, it was assumed that the MOS is under ideal conditions.
• In that ideal assumption, $\Phi<em>m = \Phi</em>s$ at VG = 0.
• However, in reality this is never the case: $\Phi<em>m \neq \Phi</em>s$ at VG = 0.
• $E<em>{Fm}$ and $E</em>{Fs}$ will align under thermal equilibrium.

Work Function Equation

• The metal-semiconductor work function difference, $\Phi_{ms}$, can be calculated by summing the energies from the Fermi level on the metal side to the Fermi level on the semiconductor side.
• $\Phi<em>{ms} = (\Phi'</em>m - \chi') - \frac{E<em>g}{2e} - \Phi</em>{fp}$
  • $\Phi'_m$ = modified metal work function
  • $e\chi'$ = modified electron affinity
  • $V_{ox0}$ = potential drop across the oxide for zero applied gate voltage
  • $e\Phi_{s0}$ = surface potential

Example 2.2

• Determine the metal–semiconductor work function difference, $\Phi_{ms}$, for a given MOS system and semiconductor doping:
• For an aluminum–silicon dioxide junction, $\Phi'_m = 3.20 V$ and, for a silicon–silicon dioxide junction, $\chi' = 3.25 V$.
• We may assume that $E_g = 1.12 V$.
• Let the p-type doping be $N_a = 10^{15} cm^{-3}$.

Solution

• For silicon at T = 300 K,

Flat-Band Voltage

• Previously, we have seen that $\Phi<em>m \neq \Phi</em>s$ at VG = 0.
• This causes bands on the semiconductor side edges to bend under thermal equilibrium condition.
• This band-bending needs to be brought back to zero, i.e. semiconductor bands needs to be brought back to flat condition to induce zero E-field at the interface and zero surface potential, $\Phi_{s0}$.
• Defined as the applied gate voltage such that there is no band bending in the semiconductor and, as a result, zero net space charge in this region.
• The voltage across the oxide for this case is not necessarily zero due to the work function difference and possible trapped charge in the oxide.
• The positive charge has been identified with broken or dangling covalent bonds near the oxide–semiconductor interface.
• During the thermal formation of SiO2, oxygen diffuses through the oxide and reacts near the Si–SiO2 interface to form the SiO2.
• Silicon atoms may also break away from the silicon material just prior to reacting to form SiO2.
• When the oxidation process is terminated, excess silicon may exist in the oxide near the interface, resulting in the dangling bonds.
• The charge density can be altered by annealing the oxide in an argon or nitrogen atmosphere.
• However, the charge is rarely zero.
• The net fixed charge in the oxide appears to be located fairly close to the oxide–semiconductor interface, $Q'_{ss}$.
• $V<em>{FB} = \Phi</em>{ms} - \frac{Q'<em>{ss}}{C</em>{ox}}$

Example 2.3

• Calculate the flat-band voltage for a MOS capacitor with a P-type semiconductor substrate.
• Consider a MOS capacitor with a p-type silicon substrate, a silicon dioxide insulator with a thickness of $t_{ox} = 20 nm$.
• $\Phi<em>{ms}$ is given as -1.1V. Assume that $Q'</em>{ss} = 5 \times 10^{10}$ electronic charges per cm2.
• Solution:
  • $C<em>{ox} = \frac{\epsilon</em>{ox}}{t_{ox}} = \frac{(3.9)(8.85 \times 10^{-14})}{20 \times 10^{-7}} = 1.726 \times 10^{-7} F/cm^2$
  • $Q'_{ss} = (5 \times 10^{10})(1.6 \times 10^{-19}) = 8 \times 10^{-9} C/cm^2$
  • $V<em>{FB} = \Phi</em>{ms} - \frac{Q'<em>{ss}}{C</em>{ox}} = -1.1 - \frac{8 \times 10^{-9}}{1.726 \times 10^{-7}} = -1.1 - 0.046 = -1.15 V$

Threshold Voltage

• It is defined as the applied gate voltage required to achieve the threshold inversion point.

Threshold Inversion Point

• The threshold inversion point is a condition when the surface potential is $\Phi<em>s = 2\Phi</em>{fp}$ for the P-type semiconductor and $\Phi<em>s = 2\Phi</em>{fn}$ for the N-type semiconductor.
• At this point, the inversion layer charge is neglected, and only metal charges, $Q'<em>{mT}$, oxide charge, $Q'</em>{SS}$ and the space charge, $Q'<em>{SD(max)}$ that has reached its maximum width, $x</em>{dT}$ will be considered.
• From conservation of charge:
• $Q'<em>m + Q'</em>{SS} + Q'_{SD} = 0$
• At threshold, VG = VTN, where VTN is the threshold voltage that creates the electron inversion layer charge in the P-type substrate.
• The surface potential is $\Phi<em>s = 2\Phi</em>{fp}$ at threshold, so:
  • $VTN = (\frac{|Q'<em>{SD(max)}| - Q'</em>{SS}}{C<em>{ox}}) + \Phi</em>{ms} + 2\Phi_{fp}$

Example 2.4

• Calculate the threshold voltage of a MOS capacitor with a P-type semiconductor substrate.

• Consider a MOS capacitor with a P-type silicon substrate with $N<em>a = 10^{15} cm^{-3}$, a silicon dioxide insulator with a thickness of $t</em>{ox} = 12 nm$.

• $\Phi<em>{ms}$ is given as -0.88V. Assume that $Q'</em>{ss} = 1 \times 10^{10}$ electronic charges per cm2.

• $\Phi<em>{fp} = V</em>t \ln(\frac{N<em>a}{n</em>i}) = (0.0259) \ln(\frac{10^{15}}{1.5 \times 10^{10}}) = 0.2877 V$

  • $x<em>{dT} = \sqrt{\frac{4\epsilon</em>s \Phi<em>{fp}}{eN</em>a}} = \sqrt{\frac{4(11.7)(8.85 \times 10^{-14})(0.2877)}{(1.6 \times 10^{-19})(10^{15})}} = 8.63 \times 10^{-5} cm$
  • $|Q'<em>{SD (max)}| = eN</em>a x_{dT} = (1.6 \times 10^{-19}) (10^{15})(8.63 \times 10^{-5}) = 1.381 \times 10^{-8} C/cm^2$

• A negative VTN for a P-type substrate implies a depletion mode device, i.e. a negative voltage must be applied to the gate in order to make the inversion layer charge equal to zero, whereas a positive gate voltage will induce a larger inversion layer charge. To obtain enhancement mode, the semiconductor must be somewhat heavily doped and the VTN will be a positive.

Capacitance–Voltage (C–V) Characteristics

• Capacitance versus voltage or C–V characteristics can be used to obtain information about the MOS device and the oxide–semiconductor interface.
• The capacitance of a device is defined as:
• $C = \frac{dQ}{dV}$
• The capacitance is a small-signal or ac parameter and is measured by superimposing a small ac voltage on an applied dc gate voltage.
• The capacitance, then, is measured as a function of the applied dc gate voltage.

Ideal C-V Characteristics of MOS Structure

• For ideal C-V characteristics, we will assume there is zero charge trapped in the oxide and also that there is no charge trapped at the oxide–semiconductor interface.

Three operating conditions of interest: Accumulation, Depletion, and Inversion.

• Accumulation
  • Negative voltage is applied to metal, inducing accumulation layer of holes in the semiconductor at the oxide–semiconductor interface.
  • A small differential change in voltage across the MOS structure will cause a differential change in charge on the metal gate and also in the hole accumulation charge.
• Depletion
  • A small positive voltage is applied to metal, inducing space-charge region in the semiconductor.
  • A small differential change in voltage across the MOS structure will cause a differential change in space-charge width.
  • As the space charge width increases, the total capacitance C’(depl) decreases.
  • This condition will yield a minimum capacitance C’min.
• Inversion
  • A large positive voltage is applied to metal, inducing inversion layer charge in the semiconductor.
  • A small differential change in voltage across the MOS structure will cause a differential change in inversion layer charge density.

Example 2.5

• Calculate C’ox, C’min and C’FB of a MOS capacitor with a P-type semiconductor substrate with doping concentration Na = 1016 cm-3.
• The oxide is silicon dioxide with a thickness of tox = 18 nm. The gate is aluminum.

Solution

• $C'<em>{ox} = \frac{\epsilon</em>{ox}}{t_{ox}} = \frac{(3.9)(8.85 \times 10^{-14})}{18 \times 10^{-7}} = 1.9175 \times 10^{-7} F/cm^2$
• $C'<em>{min} = \frac{\epsilon</em>{ox}}{t<em>{ox} + (\frac{\epsilon</em>{ox}}{\epsilon<em>s})x</em>{dT}} = \frac{(3.9)(8.85 \times 10^{-14})}{18 \times 10^{-7} + (\frac{3.9}{11.7})(0.30 \times 10^{-4})} = 2.925 \times 10^{-8} F/cm^2$

Frequency Effects

• In MOS structure with P-type substrate, it is established that the minority carrier electrons will form inversion layer at the oxide-semiconductor interface.
• We’ve also seen that a differential change in the capacitor voltage in the ideal case causes a differential change in the inversion layer charge density.
• This electron concentration in the inversion layer cannot change instantaneously with the change in the capacitor voltage.

Fixed Oxide Charge Effects

• We have assumed an ideal oxide in which there are no fixed oxide or oxide–semiconductor interface charges.
• These two types of charges will change the C–V characteristics.
• $V<em>{FB} = \Phi</em>{ms} - \frac{Q'<em>{ss}}{C</em>{ox}}$. The flat-band voltage shifts to more negative voltages for a positive fixed oxide charge.
• Since the oxide charge is not a function of gate voltage, the curves show a parallel shift with oxide charge, and the shape of the C–V curves remains the same as the ideal characteristics.

Interface Charge Effects

• The abrupt termination of the semiconductor’s periodic structure at the interface introduces energy states within the band gap, known as interface states.
• Unlike fixed oxide charges, these interface states can exchange charge with the semiconductor, with the net charge depending on the Fermi level position in the band gap.
• Acceptor states lie in the upper band gap and become negatively charged when the Fermi level is above them.
• Donor states lie in the lower band gap and become positively charged when the Fermi level is below them.