Sequential Logic Notes

Sequential Lab Logic

Part 1: The NAND Gate Latch

• In sequential circuits, outputs depend on both current inputs and previous outputs.

• Behavior of the NAND gate latch:

  • When inputs A and B are both 1, the latch holds its previous state.
  • When inputs A and B are different, the latch resets the outputs.

• Truth Table (based on provided states):

  • A (S8) = 0, B (S7) = 1: Outputs reset (specific outputs not defined in provided text).
  • A (S8) = 1, B (S7) = 1: Holds previous state.
  • A (S8) = 1, B (S7) = 0: Outputs reset (specific outputs not defined in provided text).
  • A (S8) = 1, B (S7) = 1: Holds previous state.

Part 2: Asynchronous 2-bit Up Counter

• Circuit Description:

  • The first flip-flop receives the clock input (CLK) from the board.
  • The output q1 of the first flip-flop is connected to the clock input (clk2) of the second flip-flop.
  • The first flip-flop toggles its state with each clock pulse.
  • The second flip-flop changes its state only when the first flip-flop transitions from 1 to 0.

• LED Indicators:

  • LED D8 is connected to the output of the first flip-flop.
  • LED D7 is connected to the output of the second flip-flop.

• Functionality:

  • LED D8 will toggle with each clock pulse.
  • LED D7 will toggle only when LED D8 transitions from on (1) to off (0).

• Components:

  • CLK: Clock input from the board
  • D2: Connected to something relating to the second flip-flop.
  • LED: Light Emitting Diode. Used to indicate the state of the flip-flops.
  • D7: Driven by second filp-flop output.
  • D8: Driven by first flip-flop output.