CpE 3201 Premidterms Reviewer

Microcomputers and Embedded Systems

  • Microcomputers: Composed of three basic components:

    • CPU

    • Memory

    • I/O

    • Designed for specific functions, often with real-time computing constraints.

  • Embedded Systems: A computer implemented for specific purposes, often operates independently of human intervention.

    • Processing Cores: Microcontrollers (MCU) and Digital Signal Processors (DSP).

    • Real-Time Response: Timeliness of response is crucial.

Historical Context

  • Apollo Guidance Computer: One of the early embedded systems developed at MIT.

  • Intel 4004: The first microprocessor designed for calculators and small systems.

Categories of Embedded Systems

  • Microprocessor (uP)

  • Microcontrollers (uC)

Software Architectures

  • Simple Control Loop: A basic architecture where software runs in loops calling subroutines managing hardware or software tasks.

  • Interrupt Controlled System: Triggered by external events; allows for more dynamic responses.

  • Cooperative Multitasking: Manages task switching based on timers; often includes an "operating system" kernel.

  • Microkernel: Allocates memory and CPU switching, with major functions handled in user mode.

  • Exokernel: Allows direct access to hardware by application programmers.

  • Monolithic Kernel: Complex structure similar to desktop operating systems like Linux or Windows.

Microcontroller Fundamentals

  • Microcontroller: A small computer on an integrated circuit (IC) with CPU, memory, and I/O peripherals.

  • Harvard Architecture: Characterized by separate memory buses for concurrent instruction and data access.

  • Instruction Sets:

    • RISC (Reduced Instruction Set Computer)

    • CISC (Complex Instruction Set Computer)

      • CISC emphasizes hardware; has small code size with more cycles per second.

  • Economical Microcontrollers: They reduce size and cost by integrating CPU, memory, and I/O on a single chip.

  • Timers:

    • Watch-Dog Timer (WDT): Resets the microcontroller during system failure.

  • Common Communication Interfaces: UART, I2C, SPI.

  • Limitations: Lack of a floating-point co-processor compared to general-purpose microprocessors.

  • Programming Languages:

    • C Language: Most common for microcontroller programming.

    • Assembly Language: Offers lower memory footprint and hardware abstraction.

PIC16F877A Microcontroller Specifications

  • Microcontroller Series: PIC16FXX series.

  • Programming Language: Primarily C.

  • CPU Architecture: RISC.

  • Instruction Set: 35 single-word instructions.

  • Operating Speed: Up to 20 MHz.

  • EEPROM Data Memory: 256 bytes.

  • Power Management:

    • Brown-out Reset (BOR): Detects power drop and resets the MCU.

  • Timer1: A 16-bit timer functional in sleep mode.

  • 10-bit ADC: Supports up to 8 channels.

  • Reset and Interrupt Vector Addresses:

    • Reset Vector: 0000h

    • Interrupt Vector: 0004h.

  • Watchdog Timer (WDT): Resets MCU upon program failure.

  • GPIO Ports:

    • Total: 33 ports (PortA - 6, PortB - 8, PortC - 8, PortD - 8, PortE - 3).

  • TRISx Register: Configures I/O ports as input or output.

    • Example Configuration:

      • Set all pins of PORTB as input: TRISB = 0xFF.

      • Set PORTB as output: TRISB = 0x00.

      • RB0 as input while others as output: TRISB = 0x01.

PORT and Peripheral Configuration in PIC16F877A

  • OPTION_REG: Controls weak internal pull-ups of PORTB.

  • PORTD: Commonly used for Parallel Slave Port (PSP) configuration.

  • PORTE: Contains three Schmitt Trigger input buffers for control inputs in parallel-slave mode.

  • PORTC: Multiplexed with USART communication (TX/RX).

Interrupts in PIC16F877A

  • Interrupt: A signal generated by external events, pausing current execution.

  • Interrupt Service Routine (ISR): Function executed upon interrupt occurrence.

  • Disadvantage: Can be confusing and error-prone without proper management.

  • GIE (Global Interrupt Enable): Enables or disables all unmasked interrupts.

  • Types of Interrupts: Maskable and Non-maskable interrupts.

  • RB0/INT Enablement: Requires setting the INTE bit in special function registers.

  • ISR Detection: Check INTF flag bit to detect RB0/INT interrupts.

  • Timer0: An 8-bit timer that generates overflow interrupts; sets TMR0IF flag on overflow.

  • ISR Management: Always disable GIE at beginning, re-enable at end.

  • ISR Prototype: Correct prototype in C: void interrupt ISR().