Computer Organization and Architecture

Computer Organization

  • Definition: How all the hardware units in a system are arranged and interconnected.
  • Focuses on:
      - Physical components
      - Internal connections
      - Data flow inside the system
  • In summary, Computer Organization can be defined as the internal hardware structure of a computer.

Computer Architecture

  • Definition: Helps in understanding the functionalities of a system.
  • Focuses on:
      - What operations the computer can perform
      - How a programmer uses the computer
      - What instructions the CPU understands
  • In summary, Computer Architecture defines the functional aspects of a computing system.

Basic Organization of a Computer

  1. Input Unit
       - Used to enter data and instructions into the computer.

  2. Control Unit (CU)
       - Controls the entire operation of the computer and decides what to do, when to do, and how to do operations.

  3. Arithmetic Logic Unit (ALU)
       - Performs:
         - Arithmetic operations: +, −, ×, ÷
         - Logical operations: AND, OR, NOT, comparisons.

  4. Primary Memory
       - Types: RAM, Cache
       - Characteristics:
         - Fast access
         - Temporary storage
         - Data is lost when power is off.

  5. Secondary Memory
       - Types: Hard Disk, SSD, Pen Drive.

  6. Output Unit
       - Displays processing results and converts machine-readable output into human-readable form.

Basic Components and Data Flow

  • Key Components:
      - Input Unit
      - Output Unit
      - Central Processing Unit (CPU)
      - Control Unit (CU)
      - Arithmetic and Logic Unit (ALU)
      - Memory Unit:
        - Primary Memory
        - Secondary Memory

Data Flow Cycle

  1. User gives input.
  2. Input goes to memory.
  3. CPU fetches data from memory.
  4. ALU processes the data.
  5. Result is stored back in memory.
  6. Output unit displays the result.
  • This cycle is known as the Fetch–Decode–Execute cycle.

Instruction and Execution

Example of Fetch, Decode, Execute

  1. Fetch → Read question.
  2. Decode → Understand question.
  3. Execute → Solve question.
  4. Store → Write answer.

Instruction Cycle

  • Definition: The sequence of steps performed by the CPU to:
      - Fetch
      - Decode
      - Execute
      - Store the result of an instruction.

Detailed Steps in Instruction Execution

Step 1: FETCH
  • The CPU fetches the instruction from memory.
  • The instruction is stored in the Instruction Register (IR).
  • The address of the instruction is given by the Program Counter (PC).
Step 2: DECODE
  • The Control Unit (CU) decodes the instruction.
  • It understands:
      - What operation to perform?
      - Which data is required?
      - Where is that data located?
Step 3: EXECUTE
  • Actual operation is performed by:
      - ALU (for arithmetic & logic)
      - Or memory / I/O unit (depending on instruction).
Step 4: STORE (Write Back)
  • Result of execution is:
      - Stored in memory,
      - Stored in a register.
  • Output may be displayed later.

Overview of Topics in CSE 211

  • Instruction Codes
  • Computer Registers
  • Computer Instructions
  • Common Bus System
  • Timing and Control
  • Instruction Cycle
  • Memory Reference Instructions
  • Input-Output and Interrupt
  • Complete Computer Description

Processor Models

Different Processor Designs

  • Every different processor type has its own design characteristics, e.g., Intel processor ≠ ARM processor; Desktop CPU ≠ Mobile CPU.
  • Modern processors are complex devices characterized by:
      - Many registers.
      - Multiple arithmetic units (for both integer and floating-point calculations).
      - Ability to manage pipelines for speeding execution.
      - Capability to run multiple programs simultaneously.
      - Execution of millions of instructions per second.
      - Support for graphics, AI, gaming, and networking.
  • To understand working mechanisms of processors, a simplified model is presented that explains:
      - Registers
      - Instructions
      - Data flow.

Basic Computer Model

  • Components:
      - A processor and memory.
  • Memory Specifications:
      - 4096 words, where 4096=2124096 = 2^{12}, necessitating 12 bits for word selection.
      - Each word is 16 bits (2 bytes) long, leading to a memory organization of 4096 × 16 bits.

Memory Details

  1. Memory is divided into locations called words. Each word has a unique address:
       - Total number of words = 4096 (addresses ranging from 0 to 4095).
  2. Each memory location stores 16 bits of data or instructions:
       - Instructions are 16-bit long.
       - Data is also stored in 16-bit format.

Machine Instructions and Program

Definition of Instructions

  • Program: A sequence of (machine) instructions arranged in a specific order to perform a task.
  • Computers do not understand high-level languages directly.
  • Machine Instruction: A group of bits that instruct the computer to perform a specific operation.
      - Written in binary (0s and 1s) and understood directly by the CPU.
      - Each instruction triggers micro-operations inside the CPU.
      - Instructions along with required data are stored in memory.
Instructions and Execution in CPU
  1. The CPU reads the next instruction from memory.
  2. The fetched instruction is stored in the Instruction Register (IR).
  3. The IR holds only one instruction at a time until it is fully executed.
  4. The control circuitry translates the instruction into a sequence of micro-operations.
  5. Without IR:
      - Instructions become unstable,
      - The Control Unit cannot decode properly,
      - Execution becomes unreliable.
  6. IR connects memory and execution.

Instruction Format and Addressing Modes

Breakdown of Computer Instruction

Parts:
  1. Opcode (Operation Code): Specifies the operation for the instruction.
  2. Address: Details the registers and/or memory locations used for that operation.

Memory Organization

  • In the Basic Computer, memory consists of 4096 words, requiring 12-bit addressing.
  • Bits Information:
       - Opcode (3 bits)
       - Addressing mode.
       - Direct addressing: Operand address in memory.
       - Indirect addressing: Address points to another address.

Addressing Modes Explanation

  • Address field can represent either:
      - Direct Address: Where the address in memory points to the operand.
      - Indirect Address: Refers to a location which contains the address of the operand (two memory accesses).
  • Effective Address (EA): Address used to access the operand directly.

Processor Registers

Register Functions

  • Processors have numerous registers that hold instructions, addresses, data, and intermediate results.
  • Key registers include:
      - Program Counter (PC): Holds the address of the next instruction in memory (12 bits needed for 4096 addresses).
      - Address Register (AR): Keeps track of memory locations being addressed (12 bits).
      - Data Register (DR): Holds operands for the processor.
      - Accumulator (AC): A general-purpose register used for operations.
      - Temporary Register (TR): Stores intermediate results.
      - Input Register (INPR) and Output Register (OUTR): Communicate with input/output devices.

General Purpose Register Significance

  • General purpose registers can be accessed in various instructions (e.g., loading values or storing results).
  • Example:
      - LOAD AC, 200 (Load contents of memory[200] into AC).
      - STORE AC, 300 (Store contents of AC into memory[300]).

Input/Output Operations

Basic I/O Model

  • The Basic Computer uses a simple model for input/output operations:
      - Input devices send 8 bits of character data to the processor.
      - The processor sends 8 bits of character data to output devices.
      - INPR: Holds 8-bit character from an input device.
      - OUTR: Holds 8-bit character to send to an output device.

Flags Role in I/O Operations

  • Flags indicate the state of results post-ALU operations:
      - Zero flag (Z): Results = 0 → Z flag = 1.
      - Carry flag (CY): Generated carry → CY = 1.

Common Bus System and Control Signals

Bus System Overview

  • Registers in Basic Computer connect via a bus:
      - A bus comprises shared wires, reducing circuit complexity.
      - Only one register can send data to the bus at a time, while another register reads from it.

Control Signals and Loading Process

  • Control signals dictate which register is selected by the bus based on 3 control lines (S2, S1, S0).
  • Register loading involves:
      - If Load = 1, the register copies data from the bus.
      - If Load = 0, the register ignores bus data, using only for specified processes.

Complete Computer Design

Hardware Components

  • Components include:
      - Memory unit (4096 x 16)
      - Registers (e.g., AR, PC, DR, AC, IR, TR, OUTR, INPR)
      - Flip-Flops (e.g., I, S, E, R, IEN, FGI, FGO)
      - Decoders:
        - 3x8 Opcode decoder
        - 4x16 timing decoder
      - Common bus and Control logic gates for arithmetic and logical operations.

Instruction Types in Basic Computer

  1. Memory-Reference Instructions: OPCODE = 000 ~ 110
       - Examples: AND, ADD, Load, Store, Branch Unconditionally, Increment and Skip If Zero.
  2. Register-Reference Instructions: OPCODE = 111, I = 0
  3. Input-Output Instructions: OPCODE = 111, I = 1.
Operational Details for Each Instruction
  • Examples of instructions and their hexadecimal representation.

Interrupts and Input/Output Management

Interrupt Overview

  • Interrupts allow the CPU to respond to I/O without wasting time on continuous checks.
  • The I/O interface monitors devices, sending requests only when necessary, called interrupt-driven I/O.

Process of Detecting and Handling Interrupts

  1. CPU finishes current instruction, detects interrupt request (R = 1), and branches to the Interrupt Service Routine (ISR).
  2. Perform I/O data transfer, then return to the interrupted program.
  3. Flags (FGI and FGO) ensure synchronization between fast CPU speeds and slow I/O devices.

Flow Charts and Control Logic Implementation

  • Systems for handling regular and interrupt-driven I/O efficiently.
  • Control of signals must adapt depending on whether it is a direct operation, an indirect one, or an interrupt.

Conclusion - The Role of CPU and Registers in Execution

  • Central to understanding the execution of instruction cycles is the interrelation between registers and control units, the precise roles they play in data flow, and managing the instruction execution efficiently.
  • Knowledge of all these components is essential as they form the backbone of computer operation and architecture.