3.5.1 DRAM Types

Key Terminology & Rating Metrics

• DRAM (Dynamic Random-Access Memory)

  • Processes one command per clock cycle and one Word = 64-bits (8-bytes) of data.

  • Original (pre-DDR) DRAM acted only on the rising edge of the clock square wave shown on an oscilloscope.

• Double Data Rate (DDR) concept

  • "Double-pumping" → data is transferred on both the rising and falling edges of each clock cycle.

  • Effective throughput ≈ 2 × bus frequency.

• Essential speed/bandwidth labels (all appear on retail stickers/spec sheets):

  • Bus Frequency (MHz Speed): clock speed of the memory bus.

  • DDR Rating / Mega Transfers per Second (MT/s): Bus Clock Speed x 2

  • PC Rating (MB/s bandwidth): DDR x 8 (1 Word = 64-bit = 8-Byte)

  • e.g. DDR-266: Bus Speed 133MHz, DDR 266 MT/s, 2128MB/s = PC-2100

• Rules of thumb when comparing RAM:

  • Match motherboard-supported DDR generation.

  • Higher MT/s ⇒ higher theoretical bandwidth.

  • Voltage drops each generation ⇒ lower power & heat.

Generational Specifications

• For each generation, the first line lists base (I/O) clock, the second lists effective data-rate (MT/s), third lists PC bandwidth (MB/s), and fourth lists nominal voltage.

DDR (a.k.a. DDR-1)

• $133\text{–}200\text{ MHz}$

• $266\text{–}400\text{ MT/s}$

• PC2100 - PC3200 (MB/s)

• $2.5\text{ V}$

• First to double-pump; 184 pins.

DDR2

• $266\text{–}400\text{ MHz}$

• $533\text{–}800\text{ MT/s}$

  PC4200 - PC6400 (MB/s)

• $1.8\text{ V}$

• Added I/O buffer between data bus & memory core, enabling four pre-fetch data set operations per cycle.

• 240 pins; notch moved slightly; narrower pin contacts vs DDR.

DDR3

• $533\text{–}800\text{ MHz}$

• $1{,}066\text{–}1{,}600\text{ MT/s}$

• PC8500 - PC14900 (MB/s)

• 1.5 V

• 240 pins (same count as DDR2 but notch in different place).

• Max density: $16\text{ GB}$ per module.

DDR4

• 1066 - 1600MHz (typical starting values)

• 2133 - 3200 MT/s (JEDEC)

• PC12800 - PC25600 (MB/s)

• 1.2 V

• Power-down & other energy-saving modes; cooler operation.

• 288 pins, notch closer to center than DDR3.

• Module densities up to $64\text{ GB}$.

DDR5

• Initial JEDEC: $1{,}600\text{–}2{,}400\text{ MHz}$ I/O ⇒ $3{,}200\text{–}4{,}800\text{ MT/s}$ (road-map extends far higher)

• 2133 - 3200 MHz

• 3200 - 6400 MT/s (JEDEC)

• PC38400 - PC51200

• Voltage: $1.1\text{ V}$

• On-DIMM Power Management IC (PMIC)—motherboard no longer handles regulation, improving signal integrity.

• Splits traditional 64-bit channel into two independent 32-bit sub-channels (some server variants → four 32-bit sub-channels) → better parallelism, lower latency.

• Same 288-pin count as DDR4 but notch slightly left-shifted.

• Very high densities: modules up to $64\text{ GB}$ (and roadmap for higher).

Physical Module Characteristics

• Pin counts & notch positions (desktop-class DIMMs):

  • DDR-1: $184$ pins; notch slightly off-center (closest to center among DDR1/2/3 comparison).

  • DDR-2: $240$ pins; notch further right; contacts are narrower → more pins fit in same length.

  • DDR-3: $240$ pins; notch moves left compared with DDR-2.

  • DDR-4: $288$ pins; notch back toward center.

  • DDR-5: $288$ pins; notch just left of DDR-4’s notch (non-interchangeable despite equal pin count).

• Key visual cue: progressively higher pin density and shifted key notch prevent mis-insertion.

Form Factors

• DIMM (Dual Inline Memory Module)

  • Generic term for full-size desktop sticks across all DDR generations.

• SO-DIMM (Small Outline DIMM)

  • Roughly half the length; used in laptops and small-form-factor PCs.

• UniDIMM (Universal DIMM)

  • Laptop-oriented design capable of accepting either DDR3 or DDR4 in the same physical slot.

  • Requires laptop CPU/chipset memory controller to support both standards.

Multichannel Memory Architectures

• Traditional single-channel: One memory controller handles all modules.

• Dual/Triple/Quad Channel: Motherboard adds additional independent controllers.

  • Example: Quad-channel board with four modules → each module tied to its own controller.

  • Maximum module count: controllers can each host multiple slots (e.g.
    quad channel × two slots/controller → eight DIMMs).

• Performance impact:

  • Ideal doubling is theoretical; real-world gains ≈ $5\% \text{–} 15\%$ due to overhead & workload nature.

• Compatibility matrix:

  • Dual-channel: supported by DDR2, DDR3, DDR4, DDR5.

  • Triple/Quad-channel: supported by DDR3, DDR4, DDR5 (not by DDR-1 or DDR-2).

  • Configuration depends on motherboard, not on the memory sticks themselves.

• Installation rule: populate color-matched slots (or follow documentation) to enable multi-channel mode.

Practical Selection & Troubleshooting Tips

• Identify existing RAM via label or system info: note $\text{DDR generation}$, $\text{MT/s}$, voltage.

• Mixing modules within same generation works but all sticks run at the lowest common speed/timing.

• Generational mismatches (e.g.
  DDR3 stick into DDR4 slot) are physically blocked by notch position—prevent damage.

• Heat & power: later generations (DDR4/DDR5) run cooler; useful in compact builds.

• Capacity planning: DDR4/DDR5 allow larger single-stick capacities—fewer modules for same GB can free up channels.

• Motherboard QVL (Qualified Vendor List): ensures timing/voltage compatibility.

Ethical & Environmental Considerations

• Lowering supply voltage each generation (2.5 V → 1.1 V) lessens overall energy consumption—beneficial for greener data centers.

• Proper selection avoids electronic waste: upgrading within compatible standards extends hardware life rather than full system replacement.

Quick Reference Equations & Definitions

• $\text{DDR rating (MT/s)} = 2\times\text{Bus frequency (MHz)}$

• $\text{PC rating (MB/s)} = \text{DDR rating}\times8$

• Word: 64-bit (8-byte) data chunk moved per operation.

• Double-pumping: rising + falling edge transfers → 2× throughput vs SDR (single data rate).