Computer Organization and Architecture Notes
School of Engineering
Course Overview
Course Name: Computer Organization and Architecture
Course Code: 22CS2405
Semester: IV
Unit I: An Overview of Computing Systems
Key Topics:
History of Computers
The Computing Device
ARM7TDMI Programmers’ Model
Introduction
Data types
Processor Modes
Registers
Program Status Registers
Vector Table
Assembler Rules and Directives
Structure of Assembly Language Modules
Registers
Directives
Macros
Loads, Stores, and Addressing
LODS and STORES instructions
Operand Addressing
ENDIANNES
Text Book Reference: Topics 1.1 to 1.3; 2.1 to 2.6; 4; 5.3, 5.4, 5.5
Overview of Computing Systems
A printed circuit board is a rigid structure containing electrical circuitry made up of embedded metal surfaces called traces and larger areas of metal called planes.
System on Chip (SoC)
Definition:
A System On a Chip (SOC) is an integrated circuit that integrates all components of a computer or other electronic system.
Components:
Combines processors, memory, and graphics chips
Advantages:
Space, time, and power efficiency.
Trend:
Increasing complexity in designs to save money and time.
Microprocessor vs. Microcontroller
Microprocessor:
Processing unit for computations; consists only of a CPU.
Commonly used in personal computers.
Microcontroller:
A complete computer system on a single chip, integrating a CPU, memory, and I/O functionalities.
Useful in embedded systems.
Block Diagram of Microprocessor
Illustrates components:
ALU (Arithmetic Logic Unit)
Control Unit
Registers
Memory
Input/Output Devices.
History of RISC (Reduced Instruction Set Computer)
Definition:
A microprocessor architecture that utilizes a small, optimized set of instructions.
Origins:
First projects from IBM, Stanford, and Berkeley in the late 1970s and early 1980s.
Notable examples: IBM 801, Stanford MIPS, Berkeley RISC 1 and 2.
Key Features:
CPI (Clock per Instruction): 1 cycle execution
Pipelining: Technique allowing simultaneous execution of multiple instruction stages.
Registers: Larger number to minimize memory interactions.
RISC vs. CISC (Complex Instruction Set Computer) Comparison
Characteristic | RISC | CISC |
|---|---|---|
Instruction Complexity | Simple (one cycle) | Complex (multiple cycles) |
Memory Reference | Few instructions reference memory | Many instructions reference memory |
Execution | Hardware execution | Micro-programmed execution |
Pipelining | Highly pipelined | Less pipelining |
Examples | ARM, PowerPC | Intel 8085, 8086 |
ARM Microprocessor Architecture
ARM2 Features:
No caches or memory management unit initially.
Added capabilities: multiply and multiply-accumulate instructions.
Achieved clock speed of 12 MHz in a 2-micron process.
ARM Products and Applications
Example Devices: Game Boy Advance, NDS (dual-screen design), PSP (PlayStation Portable).
ARM processors exhibit a powerful yet simple design philosophy, resulting in a family of designs with shared principles and a common instruction set.
ARM Design Principles
RISC: Instructions execute in a single cycle at high clock speeds.
Design Principles:
Reduced instruction set and single cycle execution
Pipeline instruction decoding
Large set of general-purpose registers
Load/store architecture (data processing applies only to registers).
ARM Features and Enhancements
Differentiation from Pure RISC: Variable cycle execution, multiple-register load/store, inline barrel shifter for performance improvement, and enhanced instructions.
Thumb Instruction Set: A 16-bit instruction set resulting in reduced code density, capable of expansion to 32-bit ARM instructions.
ARM7TDMI Processor Overview
A member of the Advanced RISC machine family:
ARM: 32-bit architecture
T: Thumb architecture extension
D: Debug extension
M: Enhanced multiplier
I: Embedded ICE macrocell extension.
ARM7TDMI Register Set
Registers: 37 total (30 general-purpose, 6 status registers, PC).
Stack Pointer (R13): Unique for each mode.
Link Register (R14): Holds addresses for subroutine/exception returns.
Program Counter (R15): Used for instruction flow control.
Assembler Directives and Rules
Structure of Assembly Language Modules:
Defined using directives like
AREA,ENTRY, andEND.Example Code Structure:
assembly AREA Example, CODE, READONLY ENTRY MOV r0, #10 MOV r1, #3 ADD r0, r0, r1 stop B stop END
General line format:
{label} {instruction|directive|pseudo-instruction} {;comment}. Labels should be clear to facilitate understanding.
Loads, Stores, and Addressing
Instruction Overview: Transfer words, half-words, or bytes to/from memory.
Load format:
LDR|STR{<size>}{<cond>} <Rd>, <addressing_mode>.
Addressing Modes:
Pre-indexed: Effective addresses calculated before the operation.
Post-indexed: Updates base registers after the operation.
ENDIANNESS in ARM
Definition: Refers to the order of byte storage in memory.
Little-endian: Lower addresses store least significant bytes.
Big-endian: Higher addresses store least significant bytes (word-invariant).
ARM Configuration: Default is little-endian, adjustable via BIGEND pin.
Conclusions
The ARM7TDMI architecture highlights efficiency through a RISC design that maximizes instruction execution speed while simplifying hardware complexity. Understanding its components and operational mechanisms such as loads, stores, and addressing modes is fundamental for effective programming and application development.
Thank You for Your Attention
Course Overview
Course Name: Computer Organization and Architecture
Course Code: 22CS2405
Semester: IV
Unit I: An Overview of Computing Systems
Key Topics:
History of Computers: Examines the evolution of computing technology from early mechanical devices to modern computers, focusing on key milestones and influential figures in the field.
The Computing Device: Discusses the fundamental components of computing devices, including input, processing, output, and storage.
ARM7TDMI Programmers’ Model: Introduction to the ARM7TDMI architecture focusing on its register model, data types, and operating modes.
Introduction: Overview of computing systems and their significance in the modern world, including the impact on various industries.
Data Types: Defines various data types used in computing and their representation in memory.
Processor Modes: Overview of different modes of operation for processors, including user mode and privileged mode, detailing their functionalities and implications for security.
Registers: Detailed discussion on the role of registers in CPU architecture, including types and functions.
Program Status Registers: Explains how these registers track the status of the processor tasks and control execution flow.
Vector Table: Introduces the vector table's structure and function in handling interrupts and exceptions.
Assembler Rules and Directives: Rules governing the structure and syntax of assembly language programming.
Structure of Assembly Language Modules: Explanation of how assembly modules are structured, enhancing the understanding of code organization.
Directives: Differentiates between various assembler directives and how they affect assembly code execution.
Macros: Discusses the use of macros to simplify complex code sequences in assembly programming.
Loads, Stores, and Addressing: Examination of instruction formats for memory access and the different addressing modes used in ARM architecture.
LODS and STORES instructions: Describes specific instructions for loading from and storing data to memory.
Operand Addressing: Discusses how operands are addressed in assembly language, focusing on indirect and direct addressing modes.
ENDIANNES: Overview of endianness and its implications for data storage and retrieval across different hardware architectures.
Text Book Reference: Topics 1.1 to 1.3; 2.1 to 2.6; 4; 5.3, 5.4, 5.5
Overview of Computing Systems
A printed circuit board is a rigid structure containing electrical circuitry made up of embedded metal surfaces called traces and larger areas of metal called planes, which provide structural integrity and electrical connectivity for the components mounted on the board.
System on Chip (SoC)
Definition:
A System On a Chip (SoC) is an integrated circuit that incorporates all components of a computer or other electronic system, enabling compact design and functionality.Components:
Combines processors, memory, graphics chips, and various I/O controllers to perform all necessary computing tasks within a single chip.
Advantages:
Space Efficiency: Minimizes the physical footprint of devices.
Time Efficiency: Reduces the time required for system integration.
Power Efficiency: Decreases energy consumption by reducing the number of discrete components.
Trend:
Increasing complexity in SoC designs aims to save costs and improve performance, with multi-core and heterogeneous computing becoming increasingly common.
Microprocessor vs. Microcontroller
Microprocessor:
A processing unit focused solely on computations that consists only of a CPU, typically used in personal computers and general-purpose applications.
Microcontroller:
A complete computer system on a single chip, integrating a CPU, memory, and I/O functionalities, often used in embedded systems such as appliances and IoT devices.
Block Diagram of Microprocessor
Illustrates components:
ALU (Arithmetic Logic Unit): Performs all arithmetic and logical operations.
Control Unit: Directs operations and controls data flow within the processor.
Registers: Fast storage locations used for temporary data holding during processing.
Memory: Storage used for program and data retention during operation.
Input/Output Devices: Interfaces that enable interaction with the outside world including peripherals.
History of RISC (Reduced Instruction Set Computer)
Definition:
A microprocessor architecture that utilizes a small, optimized set of instructions to enhance performance and efficiency.Origins:
First projects from IBM, Stanford, and Berkeley during the late 1970s and early 1980s, leading to the creation of notable architectures like IBM 801, Stanford MIPS, and Berkeley RISC 1 and 2.
Key Features:
CPI (Clock per Instruction): Optimized for executing one instruction per clock cycle, thereby increasing performance.
Pipelining: Allows simultaneous execution of multiple instruction stages, leading to higher instruction throughput.
Registers: More registers are provided to reduce memory interactions, enhancing the speed of most operations.
RISC vs. CISC (Complex Instruction Set Computer) Comparison
Characteristic | RISC | CISC |
|---|---|---|
Instruction Complexity | Simple (one cycle) | Complex (multiple cycles) |
Memory Reference | Few instructions reference memory | Many instructions reference memory |
Execution | Hardware execution | Micro-programmed execution |
Pipelining | Highly pipelined | Less pipelining |
Examples | ARM, PowerPC | Intel 8085, 8086 |
ARM Microprocessor Architecture
ARM2 Features:
Initially lacked caches and memory management unit, evolving to incorporate multiply and multiply-accumulate instructions.
Achieved a clock speed of 12 MHz in a 2-micron process, setting a precedent for future ARM designs.
ARM Products and Applications
Example Devices:
Game Boy Advance, Nintendo DS (dual-screen design), and PSP (PlayStation Portable) are notable products utilizing ARM processors.
ARM architectures demonstrate a balance of power and simplicity, reflecting a design philosophy that prioritizes efficiency and versatility, making them suitable for a range of applications from mobile devices to embedded systems.
ARM Design Principles
RISC:
Maintains that instructions execute in a single cycle while achieving high clock speeds, significantly enhancing performance.Design Principles:
Emphasizes a reduced instruction set and single-cycle execution to simplify design while maintaining power efficiency.
Features pipeline instruction decoding enabling quick instruction processing.
Uses a large set of general-purpose registers to facilitate data manipulation.
Implements a load/store architecture, ensuring that data processing instructions apply solely to registers.
ARM Features and Enhancements
Differentiation from Pure RISC:
Offers variable cycle execution for specific instructions, multiple-register load/store capabilities, inline barrel shifter to enhance performance, and advanced instructions for complex operations.
Thumb Instruction Set:
Provides a 16-bit instruction set that reduces code density while being able to expand to 32-bit ARM instructions as needed, enhancing efficiency and flexibility in programming.
ARM7TDMI Processor Overview
A member of the Advanced RISC machine family:
ARM: Represents a 32-bit architecture optimized for performance.
T: Indicates the Thumb architecture extension facilitating higher performance with a smaller instruction set.
D: Stands for Debug extension allowing easier troubleshooting and verification.
M: Highlights an enhanced multiplier, improving arithmetic operations.
I: Refers to the Embedded ICE macrocell extension that aids in debugging and development.
ARM7TDMI Register Set
Registers:
Total of 37 registers consisting of 30 general-purpose registers, 6 status registers, and the Program Counter (PC) for flow control.
Stack Pointer (R13): Unique for each operating mode to manage function calls effectively.
Link Register (R14): Stores return addresses for subroutines and exception-handling routines, enabling smooth control flow in programs.
Program Counter (R15): Plays a crucial role in directing instruction flow and managing program execution.
Assembler Directives and Rules
Structure of Assembly Language Modules:
Defined using assembler directives such asAREA,ENTRY, andENDto organize code effectively.Example Code Structure:
assembly AREA Example, CODE, READONLY ENTRY MOV r0, #10 MOV r1, #3 ADD r0, r0, r1 stop B stop END
General line format:
{label} {instruction|directive|pseudo-instruction} {;comment}. Clear labels improve code readability and facilitate understanding.
Loads, Stores, and Addressing
Instruction Overview:
Transfer instructions enable the movement of words, half-words, or bytes to and from memory effectively.
Load format:LDR|STR{<size>}{<cond>} <Rd>, <addressing_mode>.Addressing Modes:
Pre-indexed: Computes effective addresses prior to instruction execution, enhancing operational efficiency.
Post-indexed: Updates base register addresses after the operation executes, providing flexibility in memory access.
ENDIANNESS in ARM
Definition:
Refers to the order of bytes as stored in memory, which can significantly affect data processing and interoperability between systems.Little-endian: Lower memory addresses store the least significant bytes of data, which is the default configuration for ARM processors, making them compatible with various data formats.
Big-endian: Higher memory addresses store the least significant bytes, which can be important for certain applications and protocols.
ARM Configuration: Default is little-endian but can be adjusted using the BIGEND pin to perform operations that require big-endian formats.
Conclusions
The ARM7TDMI architecture demonstrates efficiency through a RISC design that maximizes instruction execution speed while simplifying hardware complexity. Understanding its components and operational mechanisms such as loads, stores, and addressing modes is fundamental for effective programming and application development in modern computing environments.