Notes on Buses and Memory Systems in Computer Architecture

Overview of Bus and Memory Systems

  • This lecture covers:
    • The interaction between computer systems, memory, and peripheral devices.
    • Types of memory in computer systems.
    • Methods of communication between microprocessors and these devices.

Importance of Hardware Interconnections

  • Components of a Microprocessor System:
    • Memory
    • Input/Output (I/O) devices
    • Timer circuits
    • Control logic units
  • All components need to communicate:
    • Without a bus system, direct connections lead to complexity (similar to a cluttered breadboard).
  • Example: register r10 combines values from multiple sources, requiring direct connections to memory and I/O devices.

Bus Interfacing

  • Definition: A bus is a bundle of wires designated for addressing, data, and control lines in microprocessor systems.
  • Example with a 32-bit microprocessor:
    • Contains a 32-bit address bus, data bus, and control bus.
  • Instead of direct connections to each component, bus architecture simplifies communication:
    • Address lines are unidirectional (output from the microprocessor), while data lines are bidirectional (allowing data flow in both directions).

Communication with Buses

  • Process Example: Input from a Keyboard
    • CPU communicates with the keyboard to read input.
    • The CPU places the input device's address on the address line.
    • The corresponding data flows from the keyboard through the data bus to the CPU.
  • Bus management:
    • The CPU controls which device accesses the data bus at any time using control signals.

Different Bus Architectures

  • Single Master Bus System: One device (CPU) controls the communication.
  • Multi-Master Bus System: Multiple devices can initiate communication, requiring tri-state buffers to manage access.
  • Bidirectional Bus: Supports data transfer in both directions, essential for I/O operations.

Addressing in Bus Systems

  • CPU communicates with devices via specific base addresses.
  • Example with the LED control from previously discussed labs:
    • The CPU communicates by sending a unique address (e.g., 2000) to the PIO controlling the LED.

Analogy for Understanding Digital Outputs

  • Airport Luggage Scenario:
    • CPU: Loading/unloading person at an airport.
    • Bus: Conveyor belt for luggage (data bus).
    • Passengers: Peripheral devices (e.g., PIOs).
    • Trolley: Temporary register for data storage.
    • Luggage Tags: Device addresses for identifying peripheral devices.

Digital Outputs

  • Operation Explanation:
    • D flip-flop triggers when the clock signal is high, latching the input value.
    • Decoder interprets address signals to activate the correct peripheral device.
  • Example Process:
    • For writing to the LED:
    • The CPU places the address in the address lines and the value (e.g., 1 for ON) in the data lines.
    • The corresponding d flip-flop is activated based on the address received by the decoder.

Digital Inputs

  • Operation Explanation:
    • Similar to digital output but focused on reading data from an external device (e.g., push button).
    • The external device sends a strobe signal to signal data readiness.
    • The process mirrors that of digital output, but the CPU captures data instead of sending it.

Memory System Characteristics

  • Memory serves as both input and output:
    • Writing data is akin to digital output; reading data mimics digital input.
  • Components involved:
    • Transistors for memory storage (e.g., D flip-flops), tri-state buffers for data reading.
  • Chip select logic:
    • Activates communication with specific memory locations (usually negative logic).

Summary

  • Bus architecture simplifies complex inter-device communication in microprocessor systems.
  • Different mechanisms exist for managing and controlling data flow within memory systems, each critical for CPU operations.
  • Understanding these interconnections helps in designing efficient computer systems.