Comprehensive Study Notes on Computer Organization and Architecture

Comparison of Computer Architecture and Computer Organization

Computer Architecture refers to the operational attributes of a computer or specifically its processor. It encompasses the physical memory structure, the Instruction Set Architecture (ISA), the number of bits utilized for data type representation, and the mechanisms for input-output and memory addressing. Essentially, architecture provides an abstract, programmer-centric view of the system, much like the high-level design of a car specifies its overall capabilities and specifications. Key architectural logic includes the instruction set, addressing modes, data types, and cache optimization strategies. In contrast, Computer Organization is the physical realization of the specifications set by the architecture. It focuses on how the operational attributes are interconnected to meet performance requirements. Organizational attributes involve hardware details, control signals, and peripheral devices. This is analogous to the piece-by-piece manufacturing and assembly of car components according to a design. Computer organization is often called microarchitecture and remains transparent to the programmer; for example, a programmer does not need to know the specific hardware implementation of an addition operation to execute software.

Historical Generations of Computers

Computer history is categorized into five distinct generations, each defined by shifts in technology. The First Generation (1946–1959) relied on vacuum tube technology for CPU circuitry and memory. These machines, such as ENIAC, EDVAC, UNIVAC, IBM-701, and IBM-650, were massive, unreliable, and generated intense heat, necessitating air conditioning. They used machine language and batch processing operating systems, utilizing punched cards and magnetic tape for I/O.

The Second Generation (1959–1965) replaced vacuum tubes with transistors, which were cheaper, more compact, and faster. This era introduced magnetic cores for primary memory and used assembly language along with high-level languages like FORTRAN and COBOL. Notable machines included the IBM 1620, CDC 1604, and UNIVAC 1108. The Third Generation (1965–1971) saw the invention of Integrated Circuits (ICs) by Jack Kilby. A single IC combined transistors, resistors, and capacitors on a chip, leading to significantly smaller and more efficient machines like the IBM-360 and Honeywell-6000 series. This generation introduced time-sharing and remote processing.

The Fourth Generation (1971–1980) was defined by Very Large Scale Integrated (VLSI) circuits, which packed roughly 5,000 transistors on a single chip. This sparked the personal computer (PC) revolution and introduced pipeline processing and distributed operating systems. Examples include the CRAY-1 supercomputer and the DEC 10. The Fifth Generation (1980–Present) utilizes Ultra Large Scale Integration (ULSI) technology, enabling microprocessor chips with ten million electronic components. This generation focuses on parallel processing hardware and Artificial Intelligence (AI) software, including robotics, neural networks, and natural language processing.

Classification and Characteristics of Computer Types

Based on operating principles, computers are classified into three types. Digital Computers operate by counting discrete numbers to evaluate arithmetic expressions and manage data like bills or ledgers. Analog Computers model problems using continuously changeable physical phenomena such as electrical or hydraulic quantities. Hybrid Computers combine both, using digital components as controllers and analog components to solve differential equations.

When classified by size and capability, Microcomputers (PCs) are the smallest, ranging from desktops to portables like Laptops (weight $3\,kg$ to $5\,kg$), Notebooks (weight $2\,kg$ to $3\,kg$), and Palmtops or Personal Digital Assistants (PDA). Wearable computers have reached a size where they are used in medicine, such as pacemakers. Workstations offer higher graphics and engineering capabilities (CAD/CAM). Minicomputers are medium-sized and designed for multiple simultaneous users. Mainframe (Enterprise) computers possess massive storage and processing speeds, supporting thousands of terminals for tasks like ATM transactions (e.g., IBM 370). Supercomputers are the fastest, measured in tens of millions of instructions per second (MIPS) and are used for complex tasks like weather analysis, exemplified by IBM Deep Blue.

Functional Units and Basic Operational Concepts

A computer system consists of five functionally independent parts: Input, Memory, Arithmetic Logic Unit (ALU), Output, and Control Unit. The Input Unit, primarily keyboards, mouse, or scanners, accepts coded information and translates it into binary code for the processor or memory. The Memory Unit stores programs and data, divided into Primary Memory (RAM and Cache) and Secondary Memory (Magnetic disks, optical disks). Primary memory cells store bits in groups called words, with the access time defined as the memory access time. The ALU executes operations like addition and subtraction on operands stored in high-speed registers. The Output Unit sends processed results to devices like monitors or printers. The Control Unit acts as the nerve center, generating timing signals that coordinate the transfer of data between all units.

Operational performance is described by the sequence of steps for instructions. For example, adding an operand at a memory location to a register involves: fetching the instruction from memory, fetching the operand from the memory location, adding it to the register contents, and storing the result. While standard transfers involve the Memory Address Register (MAR) and Memory Data Register (MDR), many modern systems separate memory access and ALU operations into distinct high-speed instructions like Load and Add for better efficiency.

Measuring Computer Performance

Computer performance is primarily measured by the speed at which it executes programs. The total time required is called elapsed time, which depends on the processor speed, disk access, and I/O. Processor time is the specific duration the CPU spends on machine instructions. The performance of the processor is often optimized using Cache Memory, which are small, fast RAM units located on the same IC chip as the processor to minimize the movement of instructions from the main memory. This is particularly effective for loops where instructions are executed repeatedly.

The basic performance equation is expressed as:

$T = \frac{N \times S}{R}$

In this formula, $T$ is the processor time, $N$ is the actual number of instruction executions, $S$ is the average number of basic steps or clock cycles needed per instruction, and $R$ is the clock rate in cycles per second. Performance can be further enhanced via pipelining, where the execution of successive instructions is overlapped, ideally reaching an effective $S$ value of $1$. Superscalar execution involves multiple pipelines to allow starting several instructions per clock cycle, potentially reducing $S$ to less than $1$. Benchmarks, such as those provided by the SPEC (System Performance Evaluation Corporation), are used to rate performance by comparing the running time of standardized programs on a test computer versus a reference machine.

Data Representation and Arithmetic Logic

Data is represented in binary format using bits ($0$ and $1$), grouped into words. Base conversion methods allow translation between Decimal, Binary, Octal, and Hexadecimal systems. In computer arithmetic, integers are often represented in Signed Magnitude or 2's Complement form. The 1's complement is found by inverting all bits, while the 2's complement is obtained by adding $1$ to the least significant bit (LSB) of the 1's complement. This simplifies subtraction operations by allowing the computer to perform addition with the complement of the subtrahend.

Error detection is managed through parity checking, where an extra bit (parity bit) is added to a data word. In even parity, the bit is set so the total number of $1$s is even; in odd parity, the total is odd. If the receiver detects the wrong parity, it ignores the data and requests retransmission. Advanced calculations involving floating-point numbers require unpacking the sign, exponent, and fraction, followed by alignment of exponents before adding or subtracting mantissas, and then normalizing the final result.

Instruction Cycle and CPU Organization

The CPU follows a rigorous instruction cycle consisting of Fetch, Decode, Fetch Operand, and Execute. This cycle is driven by timing signals $T_{0}$, $T_{1}$, and $T_{2}$. For example, at $T_{0}$, the Program Counter (PC) address is moved to the Memory Address Register (MAR). At $T_{1}$, the instruction is moved from memory to the Instruction Register (IR). At $T_{2}$, the instruction is decoded. The CPU uses specialized registers: the PC tracks the next instruction address, the IR holds the current instruction, and general-purpose registers ($R_{0}$ to $R_{n-1}$) store temporary data.

Addressing modes define how operands are located. Examples include Immediate addressing (operand in the instruction), Direct addressing ($EA = A$), Indirect addressing ($EA = (A)$), and Register Indirect ($EA = (R)$). Subroutines and nested procedures often utilize a Stack, which operates on a Last-In-First-Out (LIFO) basis managed by a Stack Pointer (SP). Reverse Polish Notation (RPN) or Postfix notation is used to evaluate complex arithmetic without parentheses by using a stack-based approach.

Memory Systems and Storage Technologies

Memory is organized in a hierarchy to balance speed and cost. RAM is categorized into Static RAM (SRAM), which uses flip-flops and maintains data as long as power is on, and Dynamic RAM (DRAM), which stores data as a charge on a capacitor and requires periodic refreshing. Virtual Memory allows for the execution of programs larger than the physical RAM by mapping logical addresses to physical disk storage through a Memory Management Unit (MMU). Direct Memory Access (DMA) allows high-speed data transfer between I/O devices (like hard drives) and RAM without continuous CPU intervention, using a DMA controller to manage the address and word count.

For secondary storage, the RAID (Redundant Array of Independent Disks) system provides performance and reliability. RAID 0 uses striping without redundancy; RAID 1 uses disk mirroring for fault tolerance; RAID 5 provides block-level striping with distributed parity, allowing the system to survive a single disk failure; and RAID 6 adds extra parity to survive two simultaneous disk failures. Multiprocessor systems further enhance performance by using multiple CPUs sharing a common memory (tightly coupled) or having private memories (loosely coupled), necessitating synchronization tools like semaphores to manage access to critical sections of code.

Questions & Discussion

Q: How many CPU clock cycles are needed to transfer a character from the keyboard to the INPR register?

A: This is a complex process. Keyboards and other serial interfaces like RS232, USB, and Firewire operate with their own clocks independent of the CPU master clock. For example, USB 2.0 operates at $480\,mbps$. The interaction is asynchronous; the FGI flip-flop is set by the I/O interface after a character is shifted in, signaling the CPU to process it. The number of master CPU cycles is not fixed, as the transfer depends on the external device's specific serial speed and the I/O interface's internal mechanisms before the CPU even notices the data.