Transistors & FET Comprehensive Study Notes

Transistor Fundamentals

• Origin of the word: “Transistor” = Transfer + Resistor; transfers an applied signal from one resistance level to another.
• Bipolar nature: Depends on interaction of both majority and minority carriers ➔ hence “bipolar junction transistor (BJT)”.
• Signal‐transfer examples: Low-resistance to high-resistance load (voltage amplification) or vice-versa (current driving).

Classification of Transistors

• BJT (Bipolar Junction Transistor)
  • npn
  • pnp
• FET (Field Effect Transistor)
  • JFET (Junction FET)
    • n-channel • p-channel
  • MOSFET (Metal-Oxide-Semiconductor FET)
    • Depletion MOSFET – n-channel / p-channel
    • Enhancement MOSFET – n-channel / p-channel

Anatomy of a BJT

• Regions & Doping
  • Emitter: Heaviest doping; supplies carriers (electrons in npn, holes in pnp).
  • Base: Very thin, lightly doped; allows most carriers to pass through.
  • Collector: Collects carriers; doping heavier than base but lighter than emitter.
  • Area profile: AC > AE > A_B
  • Doping profile: NE > NC > N_B

BJT Operating Regions

• Active Region
  • $J<em>{EB}$ forward-biased, $J</em>{CB}$ reverse-biased.
  • Device behaves as a linear amplifier.
• Saturation Region
  • Both $J<em>{EB}$ and $J</em>{CB}$ forward-biased.
  • Acts as a closed switch (ON).
• Cut-off Region
  • Both junctions reverse-biased.
  • Acts as an open switch (OFF).

Carrier Flow in Active Region

• $V<em>{EE}$ forward-biases emitter–base → majority carriers injected (electrons in npn) giving $I</em>E$.
• Recombination in thin base ⇒ small $I_B$.
• $V<em>{CC}$ reverse-biases collector–base → minority-carrier drift creates $I</em>C$.
• Current relation: $I<em>E = I</em>B + I_C$.

Transistor Configurations

• Need four terminals (2 in / 2 out). Make one terminal common:
  1. Common Base (CB)
  2. Common Emitter (CE)
  3. Common Collector (CC)

Common Base (CB) Configuration

Connection Summary

• Input: emitter ↔ base
• Output: collector ↔ base (base common)

DC Current Gain (α)

• $\alpha = \dfrac{I<em>C}{I</em>E}$
• $I<em>E > I</em>C$ ⇒ $0.9 \le \alpha \le 0.99$ (no current gain > 1).

Collector Current Expression

1. $I<em>C = I</em>{C\,Maj} + I_{CBO}$
2. $I<em>{C\,Maj}=\alpha I</em>E$
   ⇒ $I<em>C = \alpha I</em>E + I_{CBO}$

Input Characteristics (CB)

• Plot $I<em>E$ vs $V</em>{EB}$ at constant $V_{CB}$ (active region).
• Forward-diode-like curve; higher $V_{CB}$ lowers knee voltage.

Output Characteristics (CB)

• Plot $I<em>C$ vs $V</em>{CE}$ at constant $I_E$.
• Active: nearly flat (weak $V_{CB}$ dependence).
• Saturation: large $\Delta I<em>C$ for small forward $V</em>{CB}$ (negative direction).
• Cut-off: very small $I_C$ near horizontal axis.

Common Emitter (CE) Configuration

Connection Summary

• Input: base ↔ emitter
• Output: collector ↔ emitter (emitter common)

DC Current Gain (β)

• $\beta = \dfrac{I<em>C}{I</em>B}$
• $I<em>B \ll I</em>C$ ⇒ $20 \le \beta \le 500$ (large current gain).

Collector Current Derivation

• Start with $I<em>C = \alpha I</em>E + I<em>{CBO}$ and $I</em>E = I<em>C + I</em>B$.
• Algebra gives:
  $I<em>C = \beta I</em>B + I<em>{CEO}$ where $I</em>{CEO} = (\beta+1) I_{CBO}$.

Input Characteristics (CE)

• Plot $I<em>B$ vs $V</em>{BE}$ at constant $V_{CE}$.
• Diode-like; higher $V<em>{CE}$ shifts knee right (↑ $V</em>{BE(on)}$) due to reduced $I_B$.

Output Characteristics (CE)

• Plot $I<em>C$ vs $V</em>{CE}$ at constant $I_B$.
• Active: noticeable slope (Early effect) because $I<em>C$ ∝ $(\beta+1)I</em>S$ sensitive to $V_{CE}$.
• Saturation: large $\Delta I<em>C$ for small $\Delta V</em>{CE}$ (device enters low-resistance state).
• Cut-off: $I_C$ ≈ 0.

α–β Relationship

$<br /> \alpha = \frac{I<em>C}{I</em>E},\; \beta = \frac{I<em>C}{I</em>B} \implies \beta = \frac{\alpha}{1-\alpha},\quad \alpha = \frac{\beta}{\beta+1}<br />$

Common Collector (CC) Highlights

• High input resistance (~$750\;k\Omega$), low output resistance (~$50\;\Omega$).
• Voltage gain < 1; used for impedance matching (emitter-follower).

Configuration Comparison (Key Parameters)

Numerical Examples (BJT)

1. CB circuit with $I<em>E=1\,\text{mA},\; I</em>{CBO}=50\,\mu A,\; \alpha=0.92$
   $I<em>C=\alpha I</em>E + I_{CBO}=0.92(1\,\text{mA})+50\,\mu A=0.97\,\text{mA}$.
2. CB with $\alpha=0.95$, $R<em>C=2\,k\Omega$, $V</em>{RC}=2\,V$
   $I<em>C=\tfrac{2\,V}{2\,k\Omega}=1\,\text{mA}$, $I</em>E=\tfrac{I<em>C}{\alpha}=\tfrac{1}{0.95}=1.05\,\text{mA}$, $I</em>B=I<em>E-I</em>C=0.05\,\text{mA}=50\,\mu A.$

Motivation for Field-Effect Transistors

• BJT drawbacks: low input impedance (forward-biased junction) and higher noise.
• FET advantages: very high input impedance (reverse-biased or insulated gate) and lower noise.
• Control type: BJT = current-controlled, FET = voltage-controlled.

JFET (n-Channel) Structure & Operation

Construction

• n-type channel with two p+ gate regions forming two p–n junctions tied to the gate.
• Terminals: Gate (G), Drain (D), Source (S).

Channel Electric Model

• Uniformly doped channel ≈ series resistors.
• Apply $V<em>{DS}>0,\; V</em>{GS}=0$: both junctions reverse-biased → high input R; depletion wider near drain (non-uniform).

Modes of Operation

1. Ohmic (Linear) Region: small $V<em>{DS}$, $I</em>D \propto V_{DS}$; behaves as V-controlled resistor.
2. Pinch-off & Saturation
   • At $V<em>{DS}=V</em>P$ depletion reaches channel center; $I<em>D$ becomes constant = $I</em>{DSS}$.
3. Control via $V_{GS}<0$
   • Negative gate bias enlarges depletion → pinch-off at lower $V<em>{DS}$ and reduced $I</em>D$.

Shockley Equation (Transfer Relation)

$I<em>D = I</em>{DSS}\Bigl(1-\frac{V<em>{GS}}{V</em>P}\Bigr)^2$

• Example with $I<em>{DSS}=8\,\text{mA},\; V</em>P=-4\,V$:
  • $V<em>{GS}=0$ → $I</em>D=8\,\text{mA}$
  • $V<em>{GS}=-1$ → $I</em>D=4.5\,\text{mA}$
  • $V<em>{GS}=-2$ → $I</em>D=2\,\text{mA}$
  • $V<em>{GS}=-3$ → $I</em>D=0.5\,\text{mA}$
  • $V<em>{GS}=-4$ → $I</em>D=0$ (cut-off).

JFET as Voltage-Variable Resistor (VVR)

• In ohmic region $r<em>d = r</em>0\Bigl(1-\tfrac{V<em>{GS}}{V</em>P}\Bigr)^2$.
  • Given $r<em>0=10\,k\Omega,\; V</em>P=-4\,V$
  – $V<em>{GS}=0$ → $r</em>d=10\,k\Omega$
  – $V<em>{GS}=-2$ → $r</em>d=13.33\,k\Omega$
• Applications: electronic volume controls, analog multiplexers.

Small-Signal Parameters

• Transconductance: $g<em>m = \dfrac{dI</em>D}{dV<em>{GS}}\Big|</em>{V<em>{DS}=\text{const}} = \dfrac{2I</em>{DSS}}{|V<em>P|}\Bigl(1-\tfrac{V</em>{GS}}{V<em>P}\Bigr) = \dfrac{2I</em>D}{|V_P|}$.
• Dynamic Output Resistance: $r<em>d = \dfrac{\Delta V</em>{DS}}{\Delta I<em>D}\Big|</em>{V_{GS}}$.
• Amplification Factor: $\mu = g<em>m r</em>d$ (linking gate & drain control).

Depletion MOSFET (DMOSFET, n-Channel)

Construction

• p-type substrate with two n+ diffusions (D, S) and an existing n-channel.
• Gate insulated by $SiO<em>2$ ⇒ $I</em>G\approx0$.

Operation Modes

• Depletion ($V<em>{GS}<0$): gate attracts holes → recombination → channel narrows → reduced $I</em>D$.
• Enhancement ($V<em>{GS}>0$): gate attracts electrons → channel charge ↑ → $I</em>D$ ↑.
• Pinch-off at $V<em>{DS}=V</em>P$: current saturates.

Characteristics

• Output (ID–VDS): ohmic region then saturation; slope in ohmic depends on $V_{GS}$ (useful as V-controlled resistor).
• Transfer: Shockley-like: $I<em>D = I</em>{DSS}\bigl(1-\tfrac{V<em>{GS}}{V</em>P}\bigr)^2$ (valid for $V<em>{GS}\le0$) and symmetric extension for V{GS}>0 with enhancement.

Enhancement MOSFET (EMOSFET, n-Channel)

Construction

• Same p-substrate & n+ D/S but no physical channel initially.
• Gate insulated by $SiO_2$.

Threshold & Operation

• With $V<em>{GS}=0$, $I</em>D=0$ even if V_{DS}>0.
• Apply $V<em>{GS}\ge V</em>T$ (e.g., $\approx 2\,V$) ⇒ electrons induced, creating inversion layer (channel). $I<em>D$ rises with $V</em>{GS}$ (enhancement mode).

Transfer Equation

$I<em>D = k\bigl(V</em>{GS}-V_T\bigr)^2$ where $k$ depends on geometry & mobility.

Output Traits

• Ohmic (linear) region for low $V_{DS}$, saturation beyond.
• Voltage-controlled resistor in linear region.

Key FET Parameter Relations

• gₘ, rd, μ satisfy $\mu = g</em>m r_d$.
• Large μ implies high intrinsic gain capability.

Comparative Summary: BJT vs FET

DMOSFET vs EMOSFET

• Channel presence: DMOSFET has pre-existing channel; EMOSFET lacks channel until $V<em>{GS}>V</em>T$.
• Operating range: DMOSFET works for all $V<em>{GS}$ values (depletion & enhancement), EMOSFET only for V{GS}>V_T.
• Symbolic difference: EMOSFET symbol shows broken channel line.

Practical & Design Implications

• Choice of configuration (CB, CE, CC) tailors gain, impedance, and frequency response.
• FET’s high input impedance ideal for sensor interfaces & low-noise front-ends.
• Voltage-variable-resistor behavior used in analog signal processing (e.g., VCAs, filter Q-control).

Study Tips & Connections

• Reinforce diode theory: BJT junction biases behave exactly like pn-diodes.
• For small-signal models, remember $r<em>\pi = \dfrac{\beta}{g</em>m}$ for BJTs and $g<em>m$–$r</em>d$–$\mu$ triangle for FETs.
• Compare pinch-off in BJTs (collector saturation) vs FETs (channel pinch-off) to see conceptual parallels.