Segmentation

Segmentation

Memory-Management Scheme

  • Segmentation is a memory-management scheme that supports the user's view of memory.

Structure of a Program

  • A program is composed of multiple segments.

  • Each segment is a logical unit, which can include:

    • main program

    • procedures

    • functions

    • methods

    • objects

    • local variables

    • global variables

    • common blocks

    • stacks

    • symbol tables

    • arrays

User's View of a Program

  • Components of the user's view of a program include:

    • subroutine

    • stack

    • Sqrt function

    • main program

    • symbol table

    • overall program representation

    • logical address

Logical View of Segmentation

  • The logical view of segmentation illustrates the relationship between user space and physical memory space.

    • Logical address space is seen as a map, highlighting segments that users can access.

Segmentation Architecture

  • In segmentation architecture:

    • A logical address consists of a two-tuple structure:

    • Segment table:

    • Maps two-dimensional physical addresses.

    • Each table entry contains:

      • base: Contains the starting physical address where segments reside in memory.

      • limit: Specifies the length of the segment.

    • Segment-table base register (STBR): Points to the location of the segment table in memory.

    • Segment-table length register (STLR): Indicates the number of segments currently used by a program; a segment number s is considered legal if s < STLR.

Segmentation Architecture (Continued)

  • Protection mechanisms in segmentation:

    • With each entry in the segment table, the following protection features are associated:

    • Validation bit:

      • A value of 0 indicates an illegal segment.

    • Read/write/execute privileges:

      • Different permissions can be set for different segments.

    • Protection bits can be associated with segments to manage access control.

    • Code sharing occurs at the segment level.

    • Segments can vary in length, leading to the dynamic storage-allocation problem.

Segmentation Example

  • Diagrams and practical examples depicting segmentation are provided for better understanding.

Segmentation Hardware

  • Components relevant to segmentation include:

    • Limit and base registers

    • Interaction with CPU to check against physical memory

    • Handling addressing errors through traps for illegal addressing attempts.

Example of Segmentation

  • Breakdown of segments with examples includes:

    • Logical representation of program segments with associated memory addresses:

    • Segment definitions with corresponding base and limit values:

      • Example of segment 0: base at 1000 with a limit of 1400.

      • Example of segment 1: base at 400 with a limit of 6300.

      • Example of segment 2: base at 3200 with a limit of 3.

    • Overall memory layout highlighting the allocation of segments including:

    • Segments 0 through 4 with corresponding memory address spaces.

Example: The Intel Pentium

  • The Intel Pentium processor supports both segmentation and segmented paging.

    • The logical address generated by the CPU is processed as follows:

    • Passed to segmentation unit: generates a linear address.

    • Linear address is then sent to paging unit, which generates a physical address in main memory.

    • Paging units emulate the function of a Memory Management Unit (MMU).

Logical to Physical Address Translation in Pentium

  • Address translation processes:

    • Logical addresses are converted into linear addresses, which are then translated into physical addresses through a paging unit.

Intel Pentium Segmentation

  • Key components of the Pentium segmentation:

    • Logical address details

    • Selector for segments

    • Descriptor table containing segment information

    • Segment descriptor and its offset leading to a 32-bit linear address.

Pentium Paging Architecture

  • Paging structure in Pentium features a multi-level hierarchy for page directory organization:

    • Logical addresses are broken down into pages and offsets.

    • Registers such as CR3 are used to hold page directory locations.

    • Details about page sizes:

    • 4-KB pages and 4-MB pages with their respective offsets defined in the architecture.

Linear Address in Linux

  • Linear addresses are managed in a four-part structure in Linux, consisting of:

    • global directory

    • middle directory

    • page table

    • offset

Three-level Paging in Linux

  • Three-level paging involves a structured hierarchy that entails:

    • global directory entries

    • middle directory entries

    • page table entries

    • links to corresponding frames, facilitating memory management and access control in Linux architecture.