Semiconductor Diodes, Diode Applications, and Transistor Biasing Study Guide

1. Semiconductor Diode Fundamentals & Operating States

• PN Junction & Depletion Region: Formed by joining P-type and N-type materials. Recombination of free carriers near the junction creates a depletion region containing immobile positive and negative ions.

• Operational States:

  • No Applied Bias ($V = 0\,\text{V}$): Net current flow is $I = 0\,\text{A}$.

  • Reverse Bias ($V_D < 0\,\text{V}$): Expands the depletion region. Current is restricted to minority charge carriers, creating a small reverse saturation current $I_S$.

  • Forward Bias ($V_D > 0\,\text{V}$): Shrinks the depletion region, leading to heavy exponential majority carrier current flow from anode to cathode.

2. Shockley's Equation & Thermal Voltage Analysis

• Shockley's Diode Current Equation:   $I_D = I_S \left( e^{\frac{V_D}{\eta V_T}} - 1 \right)$

  • Ideality factor: $\eta = 1$ for Germanium (Ge), $\eta = 2$ for Silicon (Si).

• Thermal Voltage Equation:   $V_T = \frac{k T}{q}$

  • At room temperature ($27\,^\circ\text{C} = 300\,\text{K}$), $V_T \approx 26\,\text{mV}$.

  • At $100\,^\circ\text{C} = 373\,\text{K}$, $V_T = 32.17\,\text{mV}$.

• Simplified Expressions:

  • Forward Bias: $I_D \approx I_S e^{\frac{V_D}{\eta V_T}}$

  • Reverse Bias: $I_D \approx -I_S$

3. Breakdown Phenomena & Peak Inverse Voltage (PIV)

• Avalanche Breakdown: High reverse bias accelerates minority carriers, causing impact ionization (chain reaction breaking covalent bonds) and creating a sudden current surge at breakdown voltage $V_{BR}$.

• Peak Inverse Voltage (PIV): The maximum allowable reverse voltage that can be applied across a diode without entering breakdown and destroying the device.

4. V-I Characteristics

• Forward Knee Voltage ($V_\gamma$): Threshold voltage where current begins rising exponentially ($V_\gamma = 0.7\,\text{V}$ for Si, $0.3\,\text{V}$ for Ge).

• Temperature Dependence: Reverse saturation current $I_S$ doubles approximately every $10\,^\circ\text{C}$ temperature rise.

5. Load Line Analysis

• DC Load Line: A graphical technique applying KVL ($E = V_D + I_D R$) to determine diode operation.

  • Vertical intercept ($V_D = 0\,\text{V}$): $\left( 0, \frac{E}{R} \right)$

  • Horizontal intercept ($I_D = 0\,\text{A}$): $(E, 0)$

• Quiescent (Q) Point: The intersection of the DC load line with the non-linear V-I curve, defining $(V_{DQ}, I_{DQ})$.

6. Diode Wave-Shaping Circuits

• Clipping Circuits: Remove portions of an AC signal above or below chosen threshold levels ($V_R + V_K$).

  • Shunt Clipper: Diode branch parallel to output.

  • Series Clipper: Diode in series with signal path.

  • Double-Ended Clipper: Uses two diode branches to clip both positive and negative peak extremes.

• Clamping Circuits: Shift an AC waveform to a different DC baseline without altering waveform shape or peak-to-peak voltage ($2 V_m$).

  • Requires discharge time constant $5 R C \ge \frac{T}{2}$ to prevent voltage decay.

7. Bipolar Junction Transistors (BJT) & Operating Regions

• Configurations: Common Base (CB), Common Collector (CC), Common Emitter (CE).

• Operating Regions:

  • Active Region: BE junction forward biased, BC junction reverse biased ($I_C = \beta I_B$); used for amplification.

  • Cutoff Region: Both BE and BC junctions reverse biased ($I_C \approx 0\,\text{A}$); used as open switch.

  • Saturation Region: Both BE and BC junctions forward biased ($V_{CE(\text{sat})} \approx 0.2\,\text{V}$); used as closed switch.

8. Transistor Biasing & Stability

• DC Load Line: Derived from output KVL ($V_{CC} = I_C R_C + V_{CE}$) with intercepts $(V_{CC}, 0)$ and $\left( 0, \frac{V_{CC}}{R_C} \right)$. Optimum Q-point is centered at $V_{CEQ} = \frac{V_{CC}}{2}$.

• Thermal Instability: Temperature changes drift Q-point due to changes in $I_{CO}$, $\beta$, and $V_{BE}$ ($-2.5\,\text{mV}/^\circ\text{C}$).

• Voltage Divider Bias: Provides superior stability against $\beta$ and thermal variations. Approximate condition: $\beta R_E \ge 10 R_2$

9. Small-Signal AC Models ($r_e$ Model)

• Dynamic AC Resistance: $r_e = \frac{26\,\text{mV}}{I_E}$

• Common Base (CB): Input impedance $Z_i = r_e$, current gain $A_i \approx -1$, voltage gain $A_v = \frac{\alpha R_L}{r_e}$.

• Common Emitter (CE): Input impedance $Z_i \approx \beta r_e$, current gain $A_i = \beta$, voltage gain $A_v = -\frac{R_L}{r_e}$.

• Unbypassed Emitter Resistor ($R_E$): Increases base impedance to $Z_b \approx \beta (r_e + R_E)$, yielding stable voltage gain $A_v \approx -\frac{R_C}{R_E}$.