CPE201 Digital Design - Class 14 Notes

Simplifications

  • Universal Gates: NAND and NOR gates can be used to create any other logic gate (AND, OR, NOT).
  • waveform drawings: Important for visualizing logic state transitions and reactions to inputs.

AND-OR Logic

  • Expression example: X=AB+CDX = AB + CD.
  • Translation from basic Boolean expressions to logic gates.

AND-OR-Invert Logic

  • Implements Product of Sums (POS) expressions.
  • Heavy use of DeMorgan's theorem.
  • Example Transformation:
    • Given: (A′+B′)(C′+D′)(A' + B')(C' + D')
    • Transformed: ((AB)′(CD)′)′′((AB)'(CD)')''
    • Resulting simplified expression: (AB+CD)′(AB + CD)'.

Logic Simplification Techniques

  • Order of Operations: For Boolean algebra similar to standard math; NOT operations take highest precedence.
  • Example:
    • $AB(CD' + EF) = ABCD' + ABEF
      -$ This distributes terms in SOP form.

Universal Gates

  • NAND gates:
    • One NAND can act as NOT.
    • Two NANDs can form AND.
    • Three NANDs can create OR.
  • NOR gates:
    • One NOR acts as NOT.
    • Two NORs can form OR.
    • Three NORs can create AND.

Dual Symbols

  • NAND: (AB)′=A′+B′(AB)' = A' + B' (negative-OR)
  • NOR: (A+B)′=A′B′(A + B)' = A'B' (negative-AND)

Implementation Examples

  • Example with NAND for SOP:
    • Given: X=AB+CDX = AB + CD can be achieved through NAND transformations.

Waveforms

  • Waveform representations for logic levels illustrate how gates respond to inputs and the resultant outputs.

Integrated Circuits (ICs)

  • TTL vs CMOS:
    • TTL: Older, higher power consumption.
    • CMOS: More common, industry standard, lower power usage.

Glue Logic or Bubblegum Logic

  • Use of identifiers for various package types and pin configurations.

Reading a Datasheet

  • Understand key terms like output drive capability, operating voltage range, etc.
  • Familiarize with maximum ratings, recommended operational conditions, and functional tables for interpreting ICs.

Propagation Delay

  • Definitions:
    • tPHLt_{PHL}: High to low propagation time.
    • tPLHt_{PLH}: Low to high propagation time.
    • Typical timing details for series 7400 chips.

Input/Output Logic Levels

  • Variance in acceptable signal levels dependent on supply voltage.
    • Example: 3.3V logic typically has a VIH of 2.4V and VIL of 0.8V.

Power Dissipation

  • Every logic part draws power, creating heat; design consideration to minimize power usage below maximum rating.

Fan-Out and Loading

  • Fan-out indicates how many same chips a single chip can drive; should be kept within limits to prevent damage.

Driving LEDs

  • ICs usually can't source much current (~10mA) but can sink more (~50mA) - consider for LED connections.

Next Steps in Reading

  • Continue with sections focusing on combinational logic and properties of universal gates, comparing logic functions and operations such as comparators and encoders.

Key References

  • Keep a look out for various IC models and their respective logic functions as indicated in the readings.
  • Reference sections: 5.2 to 5.5 for more on implementing combinational logic, properties of NAND and NOR, and waveform operations.