Digital Logic Design & Computer Organization – Unit 1 Comprehensive Notes

Computer Types

  • Definition of a computer
    • “Fast electronic calculating machine” that:
    • Accepts digitised input (data)
    • Processes it using an internally stored list of instructions (program)
    • Produces output information
    • Internal storage is called memory
  • Major categories
    • Personal Computer (PC)
    • Desktop-sized processing & storage; common in homes, schools, offices
    • Notebook / Laptop
    • Compact, battery-powered, portable versions of PCs
    • Workstation
    • Desktop form-factor but higher-resolution I/O graphics; aimed at CAD/engineering design
    • Enterprise System
    • Medium–large-corporation servers; higher compute & storage than workstations; backbone of Internet services
    • Super-computer
    • Optimised for large-scale numerical tasks (e.g.
      weather prediction)

Functional Units of a Computer

  • Five mutually independent units
    • Input Unit
    • Memory Unit
    • Arithmetic Logic Unit (ALU)
    • Output Unit
    • Control Unit
  • Data pathway overview
    Input  ⟶  Memory/ALU (Processor)  ⟶  Output\text{Input}\;\longrightarrow\;\text{Memory/ALU (Processor)}\;\longrightarrow\;\text{Output}
    where every transfer is sequenced by the Control Unit

Detailed Description of Each Unit

  • Input Unit
    • Accepts source programs/high-level code or raw data
    • Keyboard most common; others: joystick, trackball, mouse, scanner
    • Converts each keystroke/event into its binary code before forwarding to Memory or Processor
  • Memory Unit
    • Stores both programs and data
    • Two levels
    1. Primary/ Main Memory
      • Semiconductor cells grouped into words; each word has an address
      • Random Access Memory (RAM)
        • Read/Write; uniform access time taccesst_{access}
      • Read-Only Memory (ROM)
        • Non-volatile; stores firmware / OS bootstrap
      • Cache
        • Small, fast SRAM blocks co-located with CPU to hide main-memory latency
    2. Secondary Memory
      • Magnetic: disks, tapes, floppies
      • Optical: CD-ROM, DVD, etc.
      • High capacity, lower cost, slower; for infrequently accessed data
  • Arithmetic Logic Unit (ALU)
    • Performs arithmetic (+, −, ×, ÷) & bit-wise logical ops
    • Operands brought from Memory into high-speed registers
    • Control unit sequences multi-step operations
  • Output Unit
    • Opposite of input; presents processed information to outside world
    • Examples: monitor, printer, speakers
  • Control Unit (CU)
    • “Nerve centre” generating timing/control signals
    • Coordinates data flow among I/O, ALU, registers, Memory

Basic Operational Concepts & Example Instruction Flow

  • Stored-program concept
    • Program resides in memory; CPU fetches, decodes, executes sequentially unless altered
  • Example assembly
    • Add LOCA, R0
    1. Fetch instruction into IRIR
    2. Fetch operand from address LOCA\text{LOCA} → R1R1/MDR
    3. ALU adds to R0R0; result back to R0R0
    • Split-load alternative
      Load LOCA, R1\text{Load LOCA, R1} then Add R1, R0\text{Add R1, R0}
  • Key processor registers
    • IRIR – current instruction
    • PCPC – address of next instruction
    • MARMAR – holds address for memory access
    • MDRMDR – data to/from memory
    • R0…Rn−1R0 \ldots R_{n-1} – general-purpose

Typical Instruction Cycle (12 steps)

  1. Program loaded (via I/P) to Memory
  2. PCPC initialised to first instruction
  3. PC→MARPC \rightarrow MAR; Read asserted
  4. After taccesst_{access}, word appears in MDRMDR
  5. MDR→IRMDR \rightarrow IR (decode phase begins)
  6. Determine whether ALU or memory is needed
  7. For memory operand: address → MARMAR ; Read
  8. MDRMDR operand → ALU input
  9. ALU performs operation
  10. If result to memory: result → MDRMDR
  11. Destination address → MARMAR ; Write asserted
  12. PC=PC+1PC = PC + 1 (next instruction fetch)

Interrupts

  • I/O device raises Interrupt Request when service needed
  • CPU saves current state, vectors to Interrupt Service Routine (ISR)
  • After ISR completion, previously saved state is restored so main program continues
  • Enables concurrency & responsive I/O without busy-waiting

Bus Structures

  • Bus = group of shared parallel lines used for data, address & control signals
  • Single-Bus architecture
    • Cheapest, flexible peripheral attachment
    • Only one master transfer at a time → arbitration logic required
  • Performance bottleneck mitigated by cache/buffer registers
  • Multiple-Bus architecture
    • Higher throughput but ↑\uparrow cost & complexity

Software Taxonomy

  • System Software
    1. Operating System (e.g., Windows, Linux, macOS)
    2. Language Processors
    • Assembler (ASM → Machine)
    • Compiler (HLL → Machine, whole program)
    • Interpreter (HLL → Machine, line-by-line)
    1. Device Drivers (bridge OS ↔ peripherals)
    2. BIOS / Firmware (bootstraps hardware; governs basic I/O)
  • Application Software
    • General-Purpose (e.g., MS-Excel\text{MS-Excel}, VLC, Photoshop)
    • Specific-Purpose (Ticketing, Payroll, HMS, etc.)
  • Utility Software
    • Antivirus, Disk-defragmenter, Text editors, etc.

Performance Metrics

  • Elapsed Time = wall-clock time to run a program; includes CPU, memory, I/O
  • Processor (CPU) Time = time CPU spends executing instructions
    \text{CPU Time} = #\text{Instructions} \times \text{Cycles per Instr} \times t_{cycle}
  • Balanced system design: optimise compiler, ISA, micro-architecture together

Multiprocessor vs. Multicomputer

  • Multiprocessor (Shared-Memory)
    • Multiple CPUs with global memory address space
    • Parallel execution of threads/tasks; high complexity & ↑\uparrow cost
  • Multicomputer (Message-Passing)
    • Separate computers interconnected by network; each has private memory
    • Communicate via explicit messages

Evolution of Computer Generations

  1. First (1940-56): Vacuum Tubes, magnetic drum, machine language, UNIVAC/ENIAC
  2. Second (1956-63): Transistors, magnetic-core memory, assembly & early HLL (COBOL, FORTRAN)
  3. Third (1964-71): Integrated Circuits, keyboards+monitors, OS with multiprogramming
  4. Fourth (1972-2010): Microprocessor (Intel 4004), personal computers, GUI, networks
  5. Fifth (2010-?): AI, parallel processing, quantum, nano-tech; goals: natural-language & self-learning machines

Data Representation – Fixed-Point Systems

  • Need positive & negative numbers → three schemes
    1. Sign-Magnitude
    • MSB is sign (0=+, 1=−); remaining n−1n-1 bits magnitude
    • Range: −(2n−1−1)  to  +(2n−1−1)-(2^{n-1}-1) \;\text{to}\; +(2^{n-1}-1); dual representations of 00
    1. 1’s Complement
    • Negative formed by bit-wise complement; still two zeros
    1. 2’s Complement
    • Negative = 2n−∣value∣2^{n} - |\text{value}|; unique 00; hardware-friendly
  • Example (4 bits)
    • +5=0101+5 = 0101
    • −5-5
    • Sign-Mag 11011101
    • 1’s Comp 10101010
    • 2’s Comp 10111011 (invert bits + add 11)

Binary Addition & Overflow

  • Half-adder truth table:
    • For inputs a,b,c<em>ina,b, c<em>{in} produce sum,c</em>out\text{sum}, c</em>{out} (standard 8-row pattern)
  • Ripple-carry addition processes from LSB→MSB propagating carries
  • Overflow when result does not fit fixed bit-width
    • Unsigned: carry out of MSB
    • 2’s complement: overflow if carry into MSB ≠\neq carry out of MSB

Character Representation (ASCII)

  • 7-bit standard; e.g., 0100 0001<em>2=41</em>16=65100100\,0001<em>2 = 41</em>{16} = 65_{10} represents ‘A’
  • Lexicographic ordering maintained because codes are sequential, aiding sorting

Floating-Point Representation (IEEE 754)

  • Normalised scientific form: (−1)S×(1.Mantissa)×2E−bias(-1)^S \times (1.\text{Mantissa}) \times 2^{E-\text{bias}}
  • Single-Precision (32-bit)
    • SS 1 bit, EE 8 bits (bias 127), MM 23 bits
    • Range ≈ ±10±38\pm 10^{\pm38}
  • Double-Precision (64-bit)
    • SS 1 bit, EE 11 bits (bias 1023), MM 52 bits
    • Range ≈ ±10±308\pm 10^{\pm308}
  • Special cases: E=0E=0 & M=0M=0 ⇒ 0.00.0; overflow/underflow when exponent outside representable range
  • Addition algorithm
    1. Align exponents
    2. Add/subtract mantissas
    3. Normalise & round (guard, round, sticky bits)
  • Multiplication algorithm
    1. Add exponents minus bias
    2. Multiply mantissas
    3. Normalise, round, set sign S=S<em>1⊕S</em>2S = S<em>1 \oplus S</em>2

Memory Organisation

  • Memory = 2k2^{k} addressable locations; each holds a word (or byte)
  • Word length common: 16→6416\to64 bits; 1 byte=8 bits1\,\text{byte}=8\,\text{bits}
  • Example: 32-bit address space → 2322^{32} (≈4 Gi) locations

Number-Base Conversions

  • Decimal ↔ Binary
    • Integer: repeated divide-by-2; Fraction: repeated multiply-by-2
    • Example 10.25<em>10=1010.01</em>210.25<em>{10} = 1010.01</em>{2}
  • Decimal ↔ Octal (radix-8); Hex ↔ Binary (4-bit nibble mapping) etc.

Complements Review

  • Radix (& Diminished) complements generalise to any base rr
    • r!′s complement=rn−Nr^{!\prime}\text{s complement} = r^{n} - N
    • (r−1)(r-1)’s complement = rn−1−Nr^{n}-1 - N
  • In binary, 2’s and 1’s complements realise these

Signed Binary Numbers (Sign Bit Convention)

  • MSB denotes sign; remaining bits magnitude (Sign-Magnitude system)
  • Digital hardware stores only bits; plus/minus represented via this MSB

Binary Codes

  • Weighted Codes obey positional weights
    • 8421 BCD: decimal digit ⇒ 4-bit pattern (0000–1001)
  • Non-Weighted Codes
    • Excess-3 (XS-3): BCD + 001120011_2; self-complementing
    • Gray Code: unit-distance; only one bit changes between successive numbers; used in rotary encoders
  • BCD (Binary-Coded Decimal)
    • Pros: human-friendly; Cons: wastes 6 invalid codes, arithmetic rules more complex
  • Alphanumeric Codes
    • ASCII (7-bit), EBCDIC (8-bit), Baudot (5-bit)
    • Enable representation of letters, digits, punctuation for data exchange