Logic Gates Notes

Logic Gates

Introduction

  • Digital circuits are built using basic logic gates.
  • Types:
    • NOT gate
    • AND gate
    • OR gate
    • NAND gate
    • NOR gate
    • EXOR gate, etc.
  • ICs contain multiple gates:
    • Small Scale Integration (SSI) < 12 gates/chip
    • Medium Scale Integration (MSI) < 100 gates/chip
    • Large Scale Integration (LSI) 1000’s gates/chip
    • Very Large-Scale Integration (VLSI) > 10410^4 gates/chip

Moore’s Law

  • Refers to an observation made by Intel co-founder Gordon Moore in 1965.
    • He noticed that the number of transistors per square inch on integrated circuits had doubled every year since their invention.
  • Moore's law predicts that this trend will continue into the foreseeable future.
  • Although the pace has slowed, the number of transistors per square inch has since doubled approximately every 18 months.
    • This is used as the current definition of Moore's law.

Binary Logic

  • Digital logic gates typically operate on binary logic.
    • Two distinct values in binary logic, denoted by 0 and 1.
  • Why binary logic?
    • It is easy to design electronic circuits with two distinct states.
    • Examples:
      • An electronic switch is either open or closed.
      • The voltage at a line is either low or high.
      • Current in a line is either flowing or not flowing.
      • Resistance value is either high or low.

Basic Logic Gates

  • NOT gate (INVERTER)
    • A single input A, and an output A’.
    • Behavior can be expressed by a truth table, which shows all possible input combinations and the corresponding output value.
  • AND gate
    • For two inputs (say, A and B), the output will be 1 if both the inputs are at 1; will be 0 otherwise.
    • AND operation denoted as A.B
    • Definition can be extended to any number of inputs.
  • OR gate
    • For two inputs (say, A and B), the output will be 1 if at least one of the inputs are at 1; will be 0 otherwise.
    • OR operation denoted as A+B
    • Definition can be extended to any number of inputs.
  • NAND gate
    • For two inputs (say, A and B), the output will be 1 if at least one of the inputs are at 0; will be 0 otherwise.
    • NAND operation denoted as (A.B)’(A.B)’
    • Definition can be extended to any number of inputs.
  • NOR gate
    • For two inputs (say, A and B), the output will be 1 if both the inputs are at 0; will be 0 otherwise.
    • NOR operation denoted as (A+B)’(A+B)’
    • Definition can be extended to any number of inputs.
  • Exclusive OR (EXOR) gate
    • For two inputs (say, A and B), the output will be 1 if an odd number of inputs are at 1; will be 0 otherwise.
    • EXOR operation denoted as
    • Definition can be extended to any number of inputs.
  • Exclusive NOR (EXNOR) gate
    • For two inputs (say, A and B), the output will be 1 if an even number of inputs are at 1; will be 0 otherwise.
    • EXNOR operation denoted as ( )’
    • Definition can be extended to any number of inputs.

How to Construct these Gates?

  • Various logic families exist:
    • Diode transistor logic (DTL)
    • Transistor transistor logic (TTL)
    • Emitter Coupled Logic (ECL)
    • Complementary Metal Oxide Semiconductor (CMOS) Logic
  • CMOS is almost universally used today.
  • Some emerging technologies also exist:
    • All-optical implementation of logic
    • Memristor based logic
    • Quantum dot logic, and many more