Fundamentals of Computer Organization and Architecture - Comprehensive Summary

  • Wiley Series on Parallel and Distributed Computing, Albert Y. Zomaya, Series Editor.
  • Fundamentals of Computer Organization and Architecture by Mostafa Abd-El-Barr and Hesham El-Rewini is published by John Wiley & Sons, Inc.
  • The book is dedicated to family members for support and love, and to students for a better tomorrow.
  • Preface:
    • The book is intended for students in computer engineering, computer science, and electrical engineering.
    • Suitable for a one-semester course on Computer Organization & Assembly Language and a one-semester course on Computer Architecture.
    • Assumes students have had a basic course on digital logic design and an introductory course on high-level computer language.
    • Reflects the authors’ experience in teaching courses on computer organization and computer architecture for more than fifteen years.
    • Takes two viewpoints of computers: the programmer’s viewpoint and the overall structure and function of a computer.
    • Provides a chapter-by-chapter review of the material covered in the book, aiming at providing course instructors, students, and practicing engineers/scientists with enough information that can help them select the appropriate chapter or sequences of chapters to cover/review.
  • Chapter 1: Introduction to Computer Systems
    • Brief historical review of the development of computer systems to understand the factors affecting computing.
    • Introduces general issues related to general-purpose and special-purpose machines.
    • Defines computer systems through interfaces at layered abstraction levels.
    • Language Architecture: Interface between application programs and high-level language.
    • Instruction Set Architecture: Interface between the basic machine instruction set and the Runtime and I/O Control.
    • Definition of computer architecture: structure, organization, implementation, and performance.
    • the structure defines the interconnection of various hardware components
    • the organization defines the dynamic interplay and management of the various components
    • the implementation defines the detailed design of hardware components
    • the performance specifies the behavior of the computer system
    • Discussion on different CPU performance measures used.
  • Chapters 2 and 3: Instruction Set Architecture and Assembly Language Programming
    • Chapter 2: Basic principles involved in instruction set architecture and design.
    • Memory locations and operations are addressed.
    • Discussion on different addressing modes.
    • Explanation of instruction execution and sequencing.
    • Application of addressing modes and instruction characteristics in writing sample segment codes.
    • Chapter 3: Issues related to assembly language programming.
    • Programmer’s view of a hypothetical machine is introduced.
    • Mnemonics and syntax used in representing different instructions for the machine model are then introduced.
    • Discussion on the execution of assembly programs and an assembly language example of the X86 Intel CISC family.
  • Chapters 4 and 5: Design and Analysis of Arithmetic Circuits and CPU Design
    • Chapter 4: Fundamental issues related to arithmetic operations and circuits.
    • Number representations, base conversion, and integer arithmetic.
    • Algorithms and hardware schemes for integer addition, subtraction, multiplication, and division.
    • Floating-point arithmetic representation, operations, and hardware schemes.
    • Chapter 5: Main issues related to the organization and design of the CPU.
    • Basic principles for understanding the instruction fetch-execution cycle and CPU register set design.
    • The use of these basic principles in the design of real machines such as the 80x86 and the MIPS.
    • Detailed discussion on a typical CPU data path and control unit design.
  • Chapters 6 and 7: Memory System Design
    • typical memory hierarchy starts with a small, expensive, and relatively fast unit, called the cache followed by a larger, less expensive, and relatively slow main memory unit
    • Cache and main memory are built using solid-state semiconductor material.
    • They are followed in the hierarchy by a far larger, less expensive, and much slower magnetic memories that consist typically of the (hard) disk and the tape.
    • Chapter 6: Factors influencing the success of a memory hierarchy.
    • Design and analysis of cache memories.
    • Chapter 7: Design and analysis of the main and the virtual memory.
    • Coverage of the different read-only memory (ROM) implementations.
  • Chapter 8: Input–Output Design and Organization
    • Study on input–output (I/O) design and organization.
    • Basic issues related to programmed and Interrupt-driven I/O.
    • Interrupt architecture in real machines such as 80x86 and MC9328MX1/MXL AITC are explained.
    • Discussion on Direct Memory Access (DMA), busses (synchronous and asynchronous), and arbitration schemes.
    • Discussion on I/O interfaces.
  • Chapter 9: Pipelining Design Techniques
    • Techniques to increase instruction execution rate: increasing clock rate or increasing the number of instructions executed simultaneously (pipelining and instruction-level parallelism).
    • Pipelining: more than one instruction being processed at the same time by dividing execution into sub-units (stages) like instruction fetch, decode, operand fetch, execution, and store of results.
    • Performance measures of a pipeline processor are introduced.
    • Instruction pipeline hazards are discussed and possible solutions are introduced.
    • Concept of arithmetic pipelining together with problems involved in designing such pipeline.
    • Review of two pipeline processors: ARM 1026EJ-S and UltraSPARC-III.
  • Chapter 10: Reduced Instruction Set Computers (RISC)
    • Study of Reduced Instruction Set Computers (RISCs).
    • RISC paradigm emphasizes enhancing computer architectures with resources for efficient execution of the most frequent and the most time-consuming operations.
    • RISC-based machines are characterized by simple and reduced instruction set, fixed instruction format, one instruction per machine cycle, pipeline instruction fetch/execute units, ample general purpose registers, Load/Store memory operations, and hardwired control unit design.
    • Evolution of RISC architectures and studies that led to their introduction.
    • Overlapped Register Windows.
    • Application of the basic RISC principles in machines such as the Berkeley RISC, the Stanford MIPS, the Compaq Alpha, and the SUN UltraSparc.
  • Chapter 11: Introduction to Multiprocessors
    • Introduction to the basic concepts related to multiprocessors, connecting processors (two or more) to share the simultaneous execution of a single task.
    • Main advantage for using multiprocessors: powerful computers by connecting many existing smaller ones + cost effectiveness.
    • Topologies used for interconnecting multiple processors, different classification schemes, and a topology-based taxonomy for interconnection networks.
    • Two memory-organization schemes for MIMD (multiple instruction multiple data) multiprocessors: Shared Memory and Message Passing.
    • Analysis and performance metrics for multiprocessors.