Computer Systems: Hardware, Architecture, Memory, and Software Fundamentals

Fundamentals of Computer Systems

  • Computer Definition: An electronic, programmable device operating under the control of instructions stored in its own memory, capable of accepting data (input), performing computations, storing data, and generating information (output).

  • Core Functional Steps:

    • Takes data as input.

    • Stores data and instructions in memory for active or future use.

    • Processes data into structured, meaningful information.

    • Generates output via display or peripheral interfaces.

    • Controls and synchronizes all operational steps.

  • Components of an Information System (IS):

    • Hardware: The physical, tangible machinery and circuitry (e.g., processors, drives, peripherals).

    • Software: Intangible, structured instruction sets dictating hardware actions (system software and application software).

    • Data: A collection of raw, unorganized facts that, when indexed and structured in databases, enables analysis and organizational decision-making.

  • Signal Representation: Digital devices process electronic signals into discrete binary states (11 representing the presence of a signal / "on", and 00 representing the absence of a signal / "off"), contrasting with continuous, smooth-wave analog signals.

Computer Architecture and Bus Interconnections

  • Functional View:

    • Data Processing: Computation and transformation across diverse data formats.

    • Data Storage: Short-term storage (temporary intermediate computation results) and long-term storage (subsequent retrieval and modification of permanent files).

    • Data Movement: Input/output data transfer between the machine and peripheral devices, or over distance via data communication links.

    • Control Unit Management: Synchronizes resource usage across functional units in response to program instructions.

  • Structural Hardware Components:

    • Central Processing Unit (CPU): Manages control flow and data transformation.

    • Main Memory: High-speed operational storage for executing code.

    • Input/Output (I/O): Moves information between the system and external environments.

    • System Interconnection (Buses): Physical electrical pathways linking the CPU, memory, and I/O devices.

  • Bus Architecture:

    • Address Bus: Unidirectional transmission of memory addresses designating operand and instruction locations.

    • Data Bus: Bidirectional data transport between CPU, memory, and peripheral controllers.

    • Control Bus: Directs timing signals, read/write commands, and hardware interrupts.

    • Status Bus: Relays operational feedback concerning data states and system conditions.

  • Motherboard: The primary circuit board integrating the CPU socket, memory slots, chipset, bus traces, and input/output controllers.

Central Processing Unit (CPU) Architecture

  • Core Subunits:

    • Control Unit (CU): Retrieves, decodes, and sequences instructions; orchestrates data movement across internal registers.

    • Arithmetic and Logic Unit (ALU): Performs arithmetic operations (+,−,×,and +,-,\times,\text{and }\frac{}{}) and Boolean logic evaluations (comparison, branching).

    • Interface Unit: Directs the transmission of instructions and data between the CPU and the system bus.

    • Registers: High-speed internal memory cells used directly by the processor during execution.

  • Common Basic Computer Registers:

    • Data Register (DR): 16 bits16\text{ bits}; holds memory operands.

    • Address Register (AR): 12 bits12\text{ bits}; stores target memory addresses.

    • Accumulator (AC): 16 bits16\text{ bits}; general-purpose processor register.

    • Instruction Register (IR): 16 bits16\text{ bits}; stores fetched machine instruction codes.

    • Program Counter (PC): 12 bits12\text{ bits}; holds the address of the next sequential instruction.

    • Temporary Register (TR): 16 bits16\text{ bits}; stores scratchpad operational data.

    • Input Register (INPR): 8 bits8\text{ bits}; holds input alphanumeric characters.

    • Output Register (OUTR): 8 bits8\text{ bits}; holds output characters destined for peripherals.

  • Fetch-Decode-Execute Cycle:

    • Fetch: The instruction at the memory address indicated by the Program Counter is retrieved and placed into the Instruction Register.

    • Decode: Logic circuitry in the Control Unit determines the instruction type and identifies operand registers.

    • Execute: The Control Unit routes operands into the ALU, executes the computation, and routes output to a destination register.

    • Increment: The Program Counter updates to point to the subsequent memory address, repeating the cycle.

  • Processor Metrics and Multiprocessing:

    • Clock Speed: Frequency of instruction cycles measured in Hertz (1 kHz=103 Hz1\,kHz = 10^3\,Hz, 1 MHz=106 Hz1\,MHz = 10^6\,Hz, 1 GHz=109 Hz1\,GHz = 10^9\,Hz).

    • Cores: Discrete physical execution units integrated on a single die (e.g., dual-core with 22, quad-core with 44, Intel Core i7 with 88, and Core i9 with 1616 physical cores).

    • Hyper-Threading: Software simulation of additional virtual/logical cores per physical core, boosting concurrent thread processing.

    • Threads: Virtual constructs sharing memory space and physical execution resources to execute multiple instruction streams concurrently.

Memory Hierarchy and Primary Storage


Computer Memory Hierarchy
  • Storage Device Operational Characteristics:

    • Volatility: Volatile memory requires continuous power to sustain data (e.g., RAM); non-volatile memory retains data when unpowered.

    • Accessibility: Random access provides equal access duration to any arbitrary storage location; sequential access requires serial traversal relative to the preceding position (e.g., magnetic tape).

    • Mutability: Read/write (mutable), read-only (immutable/factory programmed), or slow-write/fast-read.

    • Addressability: Location-addressable (indexed by numerical memory address), file-addressable, or content-addressable.

  • Random Access Memory (RAM):

    • Static RAM (SRAM): Uses a six-transistor bistable circuit; fast access times (5 ns5\,ns to 60 ns60\,ns), high cost per bit, low packaging density, and consumes power continuously without refresh; primarily used for CPU cache.

    • Dynamic RAM (DRAM): Stores bits as charges across tiny capacitor-transistor pairs; requires periodic electrical refresh cycles; offers high density and low cost per bit; serves as standard system main memory.

  • Double Data Rate (DDR) Architecture:

    • Doubles bandwidth by transferring data on both the rising and falling edges of the clock signal.

    • DRAM: 1-bit1\text{-bit} prefetch, 100–166 MT/s100\text{--}166\,MT/s, 0.8–1.3 GB/s0.8\text{--}1.3\,GB/s, operating at 3.3 V3.3\,V.

    • DDR: 2-bit2\text{-bit} prefetch, 266–400 MT/s266\text{--}400\,MT/s, 2.1–3.2 GB/s2.1\text{--}3.2\,GB/s, operating at 2.5–2.6 V2.5\text{--}2.6\,V.

    • DDR2: 4-bit4\text{-bit} prefetch, 533–800 MT/s533\text{--}800\,MT/s, 4.2–6.4 GB/s4.2\text{--}6.4\,GB/s, operating at 1.8 V1.8\,V.

    • DDR3: 8-bit8\text{-bit} prefetch, 1066–1600 MT/s1066\text{--}1600\,MT/s, 8.5–14.9 GB/s8.5\text{--}14.9\,GB/s, operating at 1.35–1.5 V1.35\text{--}1.5\,V.

    • DDR4: Bit per bank architecture, 2133–5100 MT/s2133\text{--}5100\,MT/s, 17–25.6 GB/s17\text{--}25.6\,GB/s, operating at 1.2 V1.2\,V.

    • DDR5: 16-bit16\text{-bit} prefetch, 3200–6400 MT/s3200\text{--}6400\,MT/s, 38.4–51.2 GB/s38.4\text{--}51.2\,GB/s, operating at 1.1 V1.1\,V.

  • Read-Only Memory (ROM):

    • Non-volatile primary storage containing bootstrap loader routines and system firmware (BIOS) required for device initialization.

    • Programmable ROM (PROM): Shipped blank and written once by an end-user via a specialized PROM programmer.

    • Erasable Programmable ROM (EPROM): Reprogrammable chip cleared by exposing its quartz package window to intense ultraviolet (UV) light.

    • Electrically Erasable Programmable ROM (EEPROM): Non-volatile chip updated in-place via electric pulsed charges without optical exposure.

    • Flash Memory: Block-erasable solid-state EEPROM architecture utilized in BIOS chips, USB drives, and solid-state disks.

  • CPU Cache:

    • High-speed buffer storing recent data and instruction blocks; categorized into tiered levels (L1L1, L2L2, L3L3).

    • Cache Hit: Requested data is found in cache, serving the CPU immediately without main memory latency.

    • Cache Miss: Requested data is absent in cache, requiring retrieval from higher-latency system RAM.

Secondary and External Storage


Classification of Secondary Storage Devices
  • Solid State Drive (SSD) vs. Hard Disk Drive (HDD):

    • Read/Write Operations: SSD controllers address electrical charges within grids of floating-gate transistors (pages and blocks); HDD I/O controllers mechanically sweep read/write heads across magnetic platters.

    • Performance: SSDs operate silently, exhibit near-zero mechanical latency, generate minimal heat, and deliver superior throughput; HDDs suffer from rotational latency (4500–7200 rpm4500\text{--}7200\,rpm) and head seek times (8–12 ms8\text{--}12\,ms).

    • Cost and Durability: SSDs have no moving mechanical parts, providing high shock resistance at higher per-gigabyte cost; HDDs provide inexpensive mass storage capacity (160 GB160\text{ GB} to over 2 TB2\text{ TB}) but are prone to mechanical degradation.

  • Storage Tiers:

    • Fixed Secondary Storage: Internal non-volatile media (internal SSD, HDD, internal flash).

    • Removable Secondary Storage: Portable external media (optical discs such as CD-ROM, CD-R/WORM, CD-RW, DVD, Blu-ray; magnetic floppy disks, Zip disks; USB flash drives; memory cards).

    • Tertiary / Offline Storage: High-capacity archival systems using automated robotic mechanisms to mount and dismount massive tape libraries or optical jukeboxes.

    • Cloud Storage: Remote secondary storage pooled across distributed network servers (e.g., Google Drive, Flickr, SkyDrive).

Graphics Processing Units (GPUs)

  • Architecture: Massively parallel processor consisting of hundreds or thousands of execution cores designed to run simultaneous mathematical calculations for 2D/3D image generation, video manipulation, and computer graphics.

  • CPU vs. GPU Contrast:

    • CPUs execute sequential, general-purpose tasks at high clock speeds using a smaller number of powerful cores.

    • GPUs offload graphics rendering workloads, machine learning model training, and deep neural network matrix computations via parallel data pipelines.

  • Implementations:

    • Integrated GPU: Embedded alongside the processor on the CPU die or motherboard (e.g., Intel Iris Xe); shares main system memory to reduce power draw, size, and cost.

    • Discrete GPU: Dedicated standalone expansion card connected via PCI Express slots featuring dedicated high-speed VRAM.

System Software and Operating Systems

  • Operating System (OS) Definition: Core system software serving as an interface between user applications and the physical hardware, managing low-level resource allocation, system scheduling, and hardware access.

  • Primary Functions: Processor task scheduling, resource allocation, memory management, user authentication, file access, and networking.

  • Core Design Goals: User convenience, hardware resource efficiency, and the ability to evolve over time.

  • User Interfaces:

    • Command Line Interface (CLI): Textual command prompt execution (e.g., MS-DOS commands: DIR, COPY, MD, CLS).

    • Graphical User Interface (GUI): Visual environment utilizing pointers, icons, desktops, windows, and dropdown menus.

  • Operating System Typologies:

    • Batch Operating Systems: Jobs with similar requirements are batched and executed sequentially by a resident monitor without real-time user interaction; optimizes CPU utilization.

    • Multiprogramming Systems: Keeps multiple jobs in main memory simultaneously; switches the CPU to an alternate program when the active process waits for I/O.

    • Time-Sharing Systems: Multiprogrammed systems switching processor time among multiple concurrent interactive users (e.g., the Compatible Time-Sharing System / CTSS developed by IBM in 19611961).

    • Multiprocessing Systems: Uses multiple physical processors operating in parallel; models include Symmetric (peer processors sharing identical OS images), Asymmetric (master-slave hierarchy), Uniform Memory Access (UMA), Non-Uniform Memory Access (NUMA), and Shared/Distributed Memory.


Distributed Operating System Architecture
  • Distributed Operating Systems: Connects autonomous computational nodes across a communication network while presenting the transparent illusion of a single coherent memory space.

  • Network Operating Systems: Server-based OS managing data, file-sharing, printing, and security across distinct client systems using network infrastructure.


Embedded Systems Applications
  • Embedded Operating Systems: Dedicated firmware configurations operating within specialized devices (e.g., ATMs, GPS receivers, avionics, digital cameras, microwave ovens, IoT hardware).

  • Handheld / Mobile Operating Systems: Compact systems optimized for battery-powered, handheld form factors (e.g., Android, iOS) lacking traditional desktop hard drives.

Application Software, Licensing, and Security

  • Software Paradigms:

    • Installed Software: Deployed directly to local secondary storage; provides high data security and operates independently of internet connectivity, but incurs per-machine installation overhead.

    • Web-Based Software (SaaS / Cloudware): Cloud-hosted applications accessed on demand via web browsers; offers continuous backups and platform-agnostic access, but requires network connectivity.

  • Functional Application Types: Application Suites (bundled office productivity tools), Content Access Software (web browsers, media players), Database Software (structured filing and retrieval via systems like Oracle, Microsoft SQL Server, MySQL, Access), Enterprise Software (billing, ERP, HR systems), Educational Software, and Product Engineering Software (compilers, IDEs).

  • Software Licensing Categories:

    • Register-ware: Requires submission of personal user credentials before software execution is permitted.

    • Shareware / Demoware: Copyrighted commercial software provided free on a temporary trial basis with functional or temporal restrictions.

    • Freeware: Fully featured proprietary software provided without monetary cost, though source code remains restricted.

    • Open-Source Software (OSS): Distributed under licenses granting access to human-readable source code, permitting modification, inspection, and redistribution.

    • Abandonware: Legacy software discontinued by its original vendor and no longer available for retail purchase.

  • Software Piracy Categories:

    • Counterfeit Software: Unauthorized duplication and retail sale of copyrighted software (e.g., burned CD copies).

    • OEM Unbundling: Unauthorized standalone distribution of OEM software detached from the original bundled hardware.

    • Softlifting: Purchasing a single valid license and deploying it across multiple unauthorized client systems in violation of the End-User License Agreement (EULA).

    • Internet Software Piracy: Unauthorized online copying, cracking, or redistribution of copyrighted programs.