CPE201 Digital Design - Class 16 Notes

Multiplexer (MUX)

  • Definition: A multiplexer is an electronic device that selects one of many input signals and forwards the selected input into a single line.
  • Components:
    • Selection Inputs: 'n' selection inputs determine which data input is sent to the output.
    • Data Inputs: A total of $2^n$ data inputs.
    • Output: There is one output.
  • Functionality:
    • The output is determined based on the values of the selection inputs.
  • Example Logic:
    • For $S1$ and $S0$:
    • $Y = D0 imes ar{S1} imes ar{S0} + D1 imes ar{S1} imes S0 + D2 imes S1 imes ar{S0} + D3 imes S1 imes S0$
  • Example:
    • For $S0 = 0, S1 = 0$ output is $D_0$.
    • For $S0 = 1, S1 = 0$ output is $D_1$.
    • For $S0 = 0, S1 = 1$ output is $D_2$.
    • For $S0 = 1, S1 = 1$ output is $D_3$.

Transmission Modes

  • Simplex Transmission:
    • Data transmission in one direction only.
    • Example: Television and radio signals.
  • Half Duplex Transmission:
    • Data transmission in both directions, but only one direction at a time.
    • Example: Walkie-talkies.
  • Full Duplex Transmission:
    • Data transmission in both directions simultaneously.
    • Example: Telephone communication.

Demultiplexer (DEMUX)

  • Definition: A demultiplexer is a device that takes a single input signal and selects one of many outputs corresponding to a selection input.
  • Components:
    • Selection Inputs: 'n' selection inputs.
    • Data Input: One data input.
    • Data Outputs: A total of $2^n$ outputs.
  • Functionality: The selection lines determine which output the data input is directed to.

Parity

  • Definition: Parity is an error checking technique used in digital communications.
Types of Parity
  • Even Parity:
    • The number of 1's in a data set is even. (Sum of bits is 0)
  • Odd Parity:
    • The number of 1's in a data set is odd. (Sum of bits is 1)
Parity Checking
  • Error Detection: Packets are checked against their parity to confirm integrity during transmission.
  • Procedure:
    • Include a parity bit in the data packet.
    • If the received packet doesn't match the expected parity, it indicates an error.
Applications of Parity
  • Used to enhance error detection in communication systems, ensuring specified parity is maintained.

Real Chips

  • 74HC153: Dual 4-input multiplexer.
  • 74HC151: 8-input multiplexer.
  • 74HC280: 9-bit parity generator/checker used for generating and checking parity bits in data sets.

Reading Assignments

  • Review sections on Multiplexers (6.8), Demultiplexers (6.9), and Parity Generators/Checkers (6.10).
  • Next lecture focus: Troubleshooting (5.7, 6.11), and Latches (7.1).