Semiconductor Manufacturing Overview

Semiconductor Terms

Integrated Device Manufacturers (IDMs)

  • Definition: Companies that design, manufacture, and sell their own semiconductor chips.
  • Key Features:
    • Vertically integrated: They own and operate fabrication plants (fabs).
    • Greater control over supply chain and intellectual property (IP).
    • More capital-intensive as they need to invest in fabs.

Foundries

  • Definition: Specialized semiconductor manufacturing companies that build chips designed by other firms (fabless companies).
  • Examples: TSMC (Taiwan Semiconductor Manufacturing Company)
    • Serves fabless clients like Qualcomm and NVIDIA.
    • Offers advanced process nodes (5nm and 3nm).
    • Economies of scale due to serving multiple clients.

Fabless Companies

  • Definition: Companies that design semiconductor chips but outsource manufacturing to foundries.
  • Examples: Qualcomm, Nvidia, AMD, Broadcom, Apple.

Lithography

  • Key Concept: Leading edge node technology based on lithography, which is the highest value-added step in chip manufacturing.
  • Analogy:
    • Taking an 8" x 11.5" printout and placing it on the sidewalk.
    • Fabs layer structures on top of this printout, similar to constructing a skyscraper.

Equipment and Materials Ecosystem

Wafer Fabrication Equipment

  1. Mining & Slicing:

    • Czochralski Furnace: Produces ingots.
    • Wire Saws: Slices ingots into wafers.
    • Companies: DISCO, Meyer Burger, Takatori.

  2. Edge Grinding & Polishing:

    • Purpose: Smooth wafer edges to prevent cracks and ensure uniformity.
    • Tools: Peripheral grinding tools, Chemical Mechanical Planarization (CMP) tools.
    • Companies: Applied Materials, Ebara, Revasum, SpeedFam.

  3. Etching:

    • Types:
      • Wet Etching: Bulk removal with chemicals.
      • Dry Etching: Plasma/gas for nanoscale material removal.
    • Companies: Lam Research, Tokyo Electron.

  4. Photolithography:

    • Equipment: EUD & DUV Machines, Argon Lasers for printing patterns on wafers.
    • Companies: ASML (EUV & DUV), Nikon, Canon.

  5. Deposition:

    • Types: Chemical Vapor Deposition (CVD), Physical Vapor Deposition (PVD), Atomic Layer Deposition (ALD).
    • Companies: Applied Materials, Tokyo Electron, ASM International.

  6. Ion Implantation:

    • Purpose: To modify electrical properties of silicon.
    • Equipment: Beamline implanters.
    • Companies: Axcelis, Applied Materials, Tokyo Electron.

Testing and Assembly

  1. Metrology:

    • Purpose: Measure feature dimensions, detect defects, ensure process control.
    • Companies: KLA, Zeiss, Onto Innovation.

  2. Wafer Probing:

    • Purpose: Electrical testing of die.
    • Companies: Advantest, Teradyne.

  3. Dicing and Packaging:

    • Dicing Wafers: Cutting wafers into individual dies.
    • Die Attachment: Bonding dies to packaging substrates.
    • Wire Bonding: Connecting die pads to packages with gold or copper wires.
    • Encapsulation: Sealing to protect against environmental damage.
    • Final Testing: Ensuring reliability through various tests.

Semiconductor Manufacturing Process

  1. Silicon Extraction & Purification:

    • Mining, purification of silicon.

  2. Ingot Growth & Wafer Formation:

    • Czochralski Method: Melt silicon to create an ingot, then polish.

  3. Wafer Processing:

    • Apply photoresist coating (light-sensitive polymer).
    • Exposure to EUV.
    • Developing to remove un-hardened photoresist.

  4. Etching:

    • Dry Etching: Use of plasma gases.
    • Wet Etching: Use of chemical baths.

  5. Doping (Ion Implantation):

    • Implant dopants like Boron or Phosphorus into silicon to modify the electrical properties.

  6. Deposition:

    • CVD and PVD for adding thin films of materials.

  7. Oxidation:

    • High-temperature exposure to grow silicon dioxide insulating layers, repeating cycles of lithography, etching, and deposition up to 50 times to build circuits.

  8. Electrical Testing & Sorting:

    • Automated wafer probing to check die functionality; marking defective dies for discard.

  9. Packaging (Back End):

    • Dicing wafers into individual dies.
    • Bonding dies to substrates, wire bonding, encapsulation in ceramic or epoxy.

  10. Final Testing:

    • Burn-in tests for thermal stress and performance validation to ensure reliability.