Basic Computer Organization & Design Study Notes

BASIC COMPUTER ORGANIZATION AND DESIGN

  • Overview of Basic Computer Organization and Design
    • Instruction Codes
    • Computer Registers
    • Computer Instructions
    • Timing and Control
    • Instruction Cycle
    • Memory Reference Instructions
    • Input-Output and Interrupt
    • Complete Computer Description
    • Design of Basic Computer
    • Design of Accumulator Logic

INTRODUCTION

  • Every different processor type has its own design
    • Distinct registers, buses, microoperations, machine instructions, etc.
  • Modern processors are extremely complex devices
    • Contain many registers
    • Multiple arithmetic units for both integer and floating-point calculations
    • Capable of pipelining several consecutive instructions to speed execution
  • To understand processor workings, a simplified model called the Basic Computer will be introduced
    • Reflects characteristics of real processors from approximately 25 years ago
    • M. Morris Mano's Basic Computer model used to illustrate processor organization and RTL model;

THE BASIC COMPUTER

  • The Basic Computer comprises two primary components:
    • Processor and Memory
  • Memory Characteristics:
    • Contains 4096 words (equivalent to $2^{12}$), meaning 12 bits are necessary to select any word in memory
    • Each memory word is 16 bits long
    • Memory address range: 0 to 4095 (allowing 4096 locations)

INSTRUCTIONS AND INSTRUCTION CODES

  • Program: A sequence of machine instructions.
    • Machine Instruction: A group of bits dictating a specific operation (which entails multiple micro-operations).
    • Instructions and necessary data are stored in memory.
    • CPU retrieves the next instruction into an Instruction Register (IR).
    • Control circuitry translates the IR into a sequence of microoperations for implementation.

INSTRUCTION FORMAT

  • A Computer instruction is typically divided into two segments:
    • Opcode (Operation Code): Specifies the operation.
    • Address: Identifies the registers and/or memory locations for that operation.
  • In Basic Computer, since memory consists of 4096 (= $2^{12}$) words, it employs 12 bits to specify memory addresses.
  • The instruction contains bit 15 that designates the addressing mode:
    • Direct addressing (0)
    • Indirect addressing (1)
    • Remaining 3 bits are allocated for the opcode (since instructions are 16 bits long).

ADDRESSING MODES

  • Address Field in Instructions:
    • Direct Address: The actual address in memory for the operand.
    • Indirect Address: The address in memory which points to the actual address for the data.
    • Effective Address (EA): Accessible directly to access an operand or the target address in branch instructions.

PROCESSOR REGISTERS

  • Multiple registers in the processor hold instructions, addresses, data, and more:
    • Program Counter (PC): Holds the next instruction memory address (needs 12 bits for 4096 locations).
    • Address Register (AR): 12-bit register tracking memory locations accessed.
    • Data Register (DR): Holds the found operand from memory.
    • Accumulator (AC): Single general-purpose register used in most operations.
    • Temporary Register (TR): Stores intermediate or temporary data.
    • Input Register (INPR): Holds 8-bit input data from devices.
    • Output Register (OUTR): Holds 8-bit output data for devices.

BASIC COMPUTER REGISTERS

  • List of Registers in Basic Computer:
    • DR (Data Register): 16 bits, for memory operands.
    • AR (Address Register): 12 bits, for memory address tracking.
    • AC (Accumulator): 16 bits, general-purpose processor register.
    • IR (Instruction Register): 16 bits, holds instruction codes.
    • PC (Program Counter): 12 bits, for instruction memory addresses.
    • TR (Temporary Register): 16 bits, for temporary storage.
    • INPR (Input Register): 8 bits, for input characters.
    • OUTR (Output Register): 8 bits, for output characters.

COMMON BUS SYSTEM

  • Registers in the Basic Computer are interconnected via a bus:
    • Economy of circuitry compared to full connections between each register.

CONTROL OF COMMON BUS

  • Three control lines (S2, S1, S0) determine the register selected by the bus:
    • Specific register’s load signal activated to receive data from the bus.
    • Memory may also have its read signal activated.
    • Example configurations specified by combination of high and low bits for registers.

BASIC COMPUTER INSTRUCTIONS

  • Basic Computer Instruction Format:
    • Various instruction types differentiate by opcode:
    • Memory-Reference Instructions (Opcode 000 ~ 110)
    • Register-Reference Instructions (Opcode 111, I = 0)
    • Input-Output Instructions (Opcode 111, I = 1)

INSTRUCTION SET COMPLETENESS

  • A complete instruction set allows construction of programs to evaluate any computable function:
    • Functional Instructions: e.g., arithmetic operations like ADD, CLA.
    • Transfer Instructions: e.g., moving data between memory and registers.
    • Control Instructions: e.g., program sequence controls like BUN, ISZ.
    • Input/Output Instructions: e.g., INP, OUT.

CONTROL UNIT

  • Control Unit (CU) translates machine instructions to control signals for microoperations:
    • Implemented through:
    • Hardwired Control: Sequential and combinational circuits generate control signals.
    • Microprogrammed Control: Uses control memory containing microprograms.
  • Basic Computer focuses on hardwired implementation of the CU.

TIMING AND CONTROL

  • Timing signals are generated via a 4-bit sequence counter and a 4x16 decoder.
  • Example sequence indicated by timing signals within various steps.

INSTRUCTION CYCLE

  • Basic Computer follows an instruction cycle sequence:
    1. Fetch instruction from memory.
    2. Decode the instruction.
    3. Read effective address from memory for indirect instructions.
    4. Execute the instruction.
  • Following execution, the cycle repeats at step 1 for the next instruction.

FETCH AND DECODE

  • Execution of fetch and decode processes outlined:
    • T0: Transfer PC to AR (activating the bus).
    • T1: Fetch instruction from memory via AR,
    • T2: Decode instruction from IR to determine execution operation.

MEMORY REFERENCE INSTRUCTIONS

  • Define several common memory reference operations and symbol descriptions:
    • For example, AND, ADD, LDA, STA, where DR loads data from AR.

FLOWCHART FOR MEMORY REFERENCE INSTRUCTIONS

  • Presents flowchart detailing operational flow through each instruction type from DR loading to processing output.

INPUT-OUTPUT AND INTERRUPT

  • Configuration details for input-output systems:
    • Includes factors like input and output registers, input/output flags, and interrupt enable flags.
  • Serial communication paths and parallel communications details define interactions between devices and processors.

INPUT-OUTPUT INSTRUCTIONS

  • Instructions follow a pattern determined by yes/no states of flags for input and output conditions.
  • Each instruction manipulation guides how data is fetched or sent.

PROGRAM-CONTROLLED DATA TRANSFER

  • A structured loop highlights interactions between FGI and output flag signals through status checks before transferring data.

INTERRUPT INITIATED INPUT/OUTPUT

  • Interrupts are processed differently to save CPU time and allow monitoring outside the CPU when I/O devices initiate requests.

FLOWCHART FOR INTERRUPT CYCLE

  • Details how interrupts manage CPU operations, including the management of branch instructions to service routines and returning to execution.

REGISTER TRANSFER OPERATIONS IN INTERRUPT CYCLE

  • Describes register transfer statements needed during the interrupt cycle, including the handling of various states.

FURTHER QUESTIONS ON INTERRUPT

  • Raises thematic explorations regarding interrupt identification and managing simultaneous requests.

COMPLETE COMPUTER DESCRIPTION

  • Comprehensive flowchart and micro-operations to detail the overall functioning of the Basic Computer.

DESIGN OF BASIC COMPUTER (BC)

  • Hardware components comprising the Basic Computer:
    • Memory unit configuration (4096 x 16).
    • Register array and control logic features.

CONTROL OF REGISTERS AND MEMORY

  • Detailed how each register modifies the content of the Address Register (AR).

CONTROL OF FLAGS

  • Presents control mechanisms for interrupt handling flags (IEN).

CONTROL OF COMMON BUS

  • Interaction specifications for bus control and how registers are accessed based on these control lines.

DESIGN OF ACCUMULATOR LOGIC

  • Circuit designs associated with the accumulator register (AC) detailing operational changes and logic gates involved in its control.

PROGRAMMING THE BASIC COMPUTER

  • Introduction to different programming languages along with their syntax, operations, and implementation strategies.

ASSEMBLER

  • Two-pass assembler principles for converting symbolic assembly language to machine code.

SUBROUTINES

  • Definitions and examples outlining the use of subroutines within programs along with linkage of parameters and data between subroutines and main programs.

INPUT OUTPUT PROGRAM

  • Example program demonstrating input, output, and character manipulations with flow control embedded within.