Detailed Notes on NMOS, CMOS & BiCMOS Circuits Lecture 9
Lecture 9: NMOS, CMOS, & BiCMOS Circuits
Instructor: Dr. Manuel Jiménez
Course: INEL-4207 Digital Electronics
Lecture Objectives
- Understanding of basic NMOS circuits
- NMOS inverter analysis
- NMOS logic gates
- Overview of CMOS circuits
- CMOS inverter analysis
- CMOS logic gates
- Introduction to BiCMOS circuits
NMOS Inverter with Resistive Load
Circuit Operation
- When input voltage (vi) is LOW:
- Transistor (Q) is OFF.
- Drain current (iD) = 0.
- Output voltage (vo) = VDD.
- When input voltage (vi) is HIGH:
- Transistor (Q) is ON.
- Drain current (iD) ≠ 0.
- Output voltage (vo) = VDD - iDRD.
Voltage Transfer Characteristics (VTC)
- Important thresholds:
- VOO, VIL, VIH.
- Equations:
- d(vo)/d(vi) = -1 (for linear region).
Refreshing MOS Transistor Theory
NMOS Regions
- Cut-off:
- VGS ≤ Vt
- iD = 0, Output Resistance (ro) = ∞.
- Linear Region:
- VDS < (VGS - Vt)
- Use relationship for iD.
- Saturation Region:
- VDS ≥ (VGS - Vt).
NMOS Inverter VTC
Finding VOO
- Assume low input (vi < Vt): Q is OFF,
- VOO = VDD.
Finding VII
- Assume Q is saturated; using equations for current relationships.
Finding VM
- Set input and output voltages equal: vG = vD = VM.
Static Power Dissipation
Analysis
- Average power dissipation can be found as follows:
- Psta = VDD * iD.
- Observations:
- Static power varies with signal inputs.
- Dynamic behavior also impacts power.
Dynamic Power Dissipation
Calculation
- Energy delivered during transitions:
- Ed = CL * VDD² / 2.
- Total dynamic dissipation: Pd = f * CL * VDD².
Propagation Delay
- Time taken for output state to respond to input changes.
- Average propagation delay (tp):
- tp = (tP + tP) / 2.
Logic Design with MOSFETs
Basic Principles
- Pull-up network (PUN): uses PMOS.
- Pull-down network (PDN): uses NMOS.
- Relationships:
- AND operations = series; OR operations = parallel.
- Analyze worst-case conditions for switching.
Examples
Example 1: Design CMOS Inverter
- Adjust widths for n-channel based on specifications.
Example 2: Propagation Delay Computation
- Determine delays for a CMOS inverter driving other gates.
Summary
- Important factors in digital circuit design include power dissipation, propagation delay, and transistor sizing.
- Understanding VTC and load capacitances is crucial in optimizing circuit performance.