Chapter 3 csc429 actual [Compatibility Mode] (1)

Introduction

• Computer Organization and Architecture

• Chapter Title: System Architecture

• Author: Assoc. Prof. Ts. Dr. Norhaslinda Kamaruddin, UiTM Shah Alam

Compiler and Machine Code

• Compiler: A tool that translates source code into object code.

• Machine Code: Code that can be directly executed by the CPU.

• Linker: Converts object code into machine code for execution.

Transition from Hardware to Software

• Hardwired Systems: Inflexible systems requiring physical changes to change functions.

• General Purpose Hardware: Can perform various tasks with proper control signals, eliminating the need for rewiring.

Program Fundamentals

• Definition of a Program: A sequence of steps involving arithmetic, logical, control, or data movement operations.

• Each operation requires a unique set of control signals.

Program Execution

• Execution Process: Each operation is represented by unique codes (e.g., ADD, MOVE) that are interpreted by hardware circuits to issue control signals.

Historical Context

• John von Neumann: Notable mathematician, proposed foundational concepts for computer architecture (1945).

• EDVAC: Early computer design documented by von Neumann.

The von Neumann Architecture

• Key components:

  • Arithmetic and Logic Unit (ALU): Performs calculations and logical operations.

  • Control Unit: Directs operations and manages the flow of instructions.

  • Main Memory: Stores data and programs for execution.

  • Input/Output Systems: Manage data transfer between the computer and external devices.

Architecture vs. Organization

• Architecture: Specifies attributes visible to the programmer (instruction set, addressing techniques).

• Organization: Refers to how features are implemented (hardware configuration, control signals).

Functional Structure and Components

• Structure: Static relationships among components (e.g., CPU, memory, I/O).

• Function: Dynamic behavior and operations of each component.

Central Processing Unit (CPU)

• Core components: Control Unit, ALU, and Registers.

• Function of CPU:

  • Executes programs stored in memory.

  • Fetches instructions and decodes them.

• Registers: Temporary storage within the CPU for quick access to data and instructions.

Memory Architecture

• Main Memory: Temporary data storage; includes registers like Program Counter (PC) and Instruction Register (IR).

• Memory Registers: Facilitate data movement, including MAR (Memory Address Register) and MDR (Memory Data Register).

Control Unit Functionality

• Control Unit Role: Interprets and controls instruction execution, manages the fetch/execute cycle.

• Utilizes a control bus to send and receive signals.

Arithmetic Logic Unit (ALU)

• Performs arithmetic and logic operations.

• Controlled by signals from the Control Unit.

Processor Machine Cycle

• Fetch: Retrieve instruction from memory.

• Decode: Translate instruction into commands for execution.

• Execute: Perform the operation indicated by the instruction.

• Store: Write results back to memory.

Instruction Cycle

• Consists of Fetch and Execute phases, repeating continuously.

Interrupt Handling

• Mechanism allowing external devices to interrupt the normal processing sequence.

• Interrupt Cycle: Processor checks for interrupts and handles them appropriately.

• Can manage multiple interrupts via priority systems.

Bus Architecture

• Bus: Communication pathway connecting devices within the system.

  • Data Bus: Carries actual data.

  • Address Bus: Indicates memory location for data transfer.

  • Control Bus: Sends command signals.

• Buses can be structured in a single or multiple arrangements to handle data transfer efficiently.

Summary

• Centralized vs. Decentralized Bus Arbitration: How access to the bus is managed to avoid conflicts.

• Bus Timing: Events may be synchronous or asynchronous, impacting performance based on device speeds.